NX3L2T384GM,125 NXP Semiconductors, NX3L2T384GM,125 Datasheet

IC ANALOG SWITCH SPDT XQFN8U

NX3L2T384GM,125

Manufacturer Part Number
NX3L2T384GM,125
Description
IC ANALOG SWITCH SPDT XQFN8U
Manufacturer
NXP Semiconductors
Datasheet

Specifications of NX3L2T384GM,125

Number Of Switches
2
Switch Configuration
SPST
On Resistance (max)
1.6 Ohms
On Time (max)
120 ns
Off Time (max)
60 ns
Off Isolation (typ)
- 90 dB
Supply Voltage (max)
4.3 V
Supply Voltage (min)
1.4 V
Supply Current
690 nA, 800 nA
Maximum Power Dissipation
250 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
XQFN-8
Minimum Operating Temperature
- 40 C
Off State Leakage Current (max)
+/- 500 nA
Operating Frequency
60 MHz
Power Dissipation
250 mW
Switch Current (typ)
+/- 350 mA, +/- 500 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5556-2
1. General description
2. Features and benefits
The NX3L2T384 is a dual low-ohmic single-pole single-throw analog switch. Each switch
has two input/output terminals (nY and nZ) and an active LOW enable input (nE). When
pin nE is HIGH, the analog switch is turned off.
Schmitt trigger action at the enable input (nE) makes the circuit tolerant to slower input
rise and fall times. A low input voltage threshold allows pin nE to be driven by lower level
logic signals without a significant increase in supply current I
the NX3L2T384 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need
for logic level translation.
The NX3L2T384 allows signals with amplitude up to V
or from nZ to nY. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal
attenuation and distortion of transmitted signals.
NX3L2T384
Dual low-ohmic single-pole single-throw analog switch
Rev. 2 — 21 December 2010
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance (peak):
High noise immunity
ESD protection:
CMOS low-power consumption
Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
1.8 V control logic at V
Control input accepts voltages above supply voltage
Very low supply current, even when input is below V
High current handling capability (350 mA continuous current under 3.3 V supply)
Specified from 40 C to +85 C and from 40 C to +125 C
1.6  (typical) at V
1.0  (typical) at V
0.55  (typical) at V
0.50  (typical) at V
0.50  (typical) at V
HBM JESD22-A114F Class 3A exceeds 7500 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
IEC61000-4-2 contact discharge exceeds 4000 V for switch ports
CC
CC
CC
CC
CC
CC
= 1.4 V
= 1.65 V
= 3.6 V
= 2.3 V
= 2.7 V
= 4.3 V
CC
CC
to be transmitted from nY to nZ;
CC
. This makes it possible for
Product data sheet

Related parts for NX3L2T384GM,125

NX3L2T384GM,125 Summary of contents

Page 1

NX3L2T384 Dual low-ohmic single-pole single-throw analog switch Rev. 2 — 21 December 2010 1. General description The NX3L2T384 is a dual low-ohmic single-pole single-throw analog switch. Each switch has two input/output terminals (nY and nZ) and an active LOW enable ...

Page 2

... NXP Semiconductors 3. Applications  Cell phone  PDA  Portable media player 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +125 C NX3L2T384GT 40 C to +125 C NX3L2T384GD 40 C to +125 C NX3L2T384GM 5. Marking [1] Table 2. Marking codes ...

Page 3

... NXP Semiconductors 7. Pinning information 7.1 Pinning NX3L2T384 GND 4 Transparent top view Fig 3. Pin configuration SOT833-1 (XSON8) Fig 5. Pin configuration SOT902-1 (XQFN8U) 7.2 Pin description Table 3. Pin description Symbol Pin SOT833-1 and SOT996 GND 4 1E NX3L2T384 Product data sheet Dual low-ohmic single-pole single-throw analog switch ...

Page 4

... NXP Semiconductors 8. Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage ...

Page 5

... NXP Semiconductors 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage enable input nE; I current V = GND to 4.3 V ...

Page 6

... NXP Semiconductors 11.1 Test circuits GND V I  Fig 6. Test circuit for measuring OFF-state leakage current 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Symbol Parameter R ON resistance ON(peak) (peak) R ...

Page 7

... NXP Semiconductors [3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical V temperature. 11.3 ON resistance test circuit and graphs GND Fig 8. Test circuit for measuring ON resistance NX3L2T384 Product data sheet Dual low-ohmic single-pole single-throw analog switch R (Ω) ...

Page 8

... NXP Semiconductors 1 (Ω) 1.2 0.8 0 125 C. (1) T amb = 85 C. (2) T amb = 25 C. (3) T amb = 40 C. (4) T amb Fig 10. ON resistance as a function of input voltage 1 1 (Ω) 0.8 0.6 0.4 0 125 C. (1) T amb = 85 C. (2) T amb = 25 C. (3) T amb =  ...

Page 9

... NXP Semiconductors 1 (Ω) 0.8 0.6 0.4 0 125 C. (1) T amb = 85 C. (2) T amb = 25 C. (3) T amb = 40 C. (4) T amb Fig 14. ON resistance as a function of input voltage 3 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see ...

Page 10

... NXP Semiconductors 12.1 Waveform and test circuits nE input output LOW to OFF OFF to LOW Measurement points are given in Logic level the typical output voltage that occurs with the output load. OH Fig 16. Enable and disable times Table 10. Measurement points Supply voltage 4.3 V ...

Page 11

... NXP Semiconductors 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); V  specified 2.5 ns Symbol Parameter THD total harmonic distortion 3 dB frequency f (3dB) response  isolation (OFF-state) iso V crosstalk voltage ct Xtalk crosstalk ...

Page 12

... NXP Semiconductors Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 19. Test circuit for measuring the frequency response when channel is in ON-state Adjust f voltage to obtain 0 dBm level at input. i Fig 20. Test circuit for measuring isolation (OFF-state) a. Test circuit b. Input and output pulse definitions Fig 21 ...

Page 13

... NXP Semiconductors 20 log ( log Fig 22. Test circuit for measuring crosstalk between switches a. Test circuit b. Input and output pulse definitions = V  C Definition: Q inj O L V = output voltage variation generator resistance. gen V = generator voltage. gen Fig 23. Test circuit for measuring charge injection ...

Page 14

... NXP Semiconductors 14. Package outline XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1. 8× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 2.0 mm 0.5 0.04 0.17 1.9 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 15

... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 25. Package outline SOT996-2 (XSON8U) ...

Page 16

... NXP Semiconductors XQFN8U: plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm terminal 1 index area metal area not for soldering 2 1 terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.25 1.65 mm 0.5 0.00 ...

Page 17

... NXP Semiconductors 15. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 16. Revision history Table 14. Revision history Document ID Release date NX3L2T384 v.2 20101221 • Modifications: Section NX3L2T384 v.1 ...

Page 18

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 19

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 18. Contact information For more information, please visit: For sales office addresses, please send an email to: NX3L2T384 Product data sheet Dual low-ohmic single-pole single-throw analog switch 17 ...

Page 20

... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 4 9 Limiting values Recommended operating conditions Static characteristics 11.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11 ...

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