74AHC1G125GF,132 NXP Semiconductors, 74AHC1G125GF,132 Datasheet

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74AHC1G125GF,132

Manufacturer Part Number
74AHC1G125GF,132
Description
IC BUFFER/LINEDVR 3ST XSON6
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AHC1G125GF,132

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5352-2
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74AHC1G125GW
74AHCT1G125GW
74AHC1G125GV
74AHCT1G125GV
74AHC1G125GM
74AHCT1G125GM
74AHC1G125GF
74AHCT1G125GF
Ordering information
Package
Temperature range
74AHC1G125 and 74AHCT1G125 are high-speed Si-gate CMOS devices. They provide
one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by
the output enable input (OE). A HIGH at OE causes the output to assume a
high-impedance OFF-state.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
I
I
I
I
I
I
I
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
74AHC1G125; 74AHCT1G125
Bus buffer/line driver; 3-state
Rev. 09 — 22 June 2009
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
Specified from 40 C to +125 C
N
N
N
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Name
TSSOP5
SC-74A
XSON6
XSON6
Description
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
plastic surface-mounted package; 5 leads
plastic extremely thin small outline package; no
leads; 6 terminals; body 1
plastic extremely thin small outline package;
no leads; 6 terminals; body 1
1.45
1
0.5 mm
0.5 mm
Product data sheet
Version
SOT353-1
SOT753
SOT886
SOT891

Related parts for 74AHC1G125GF,132

74AHC1G125GF,132 Summary of contents

Page 1

Bus buffer/line driver; 3-state Rev. 09 — 22 June 2009 1. General description 74AHC1G125 and 74AHCT1G125 are high-speed Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output ...

Page 2

... NXP Semiconductors 4. Marking Table 2. Marking codes Type number 74AHC1G125GW 74AHCT1G125GW 74AHC1G125GV 74AHCT1G125GV 74AHC1G125GM 74AHCT1G125GM 74AHC1G125GF 74AHCT1G125GF [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram mna118 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning 74AHC1G125 ...

Page 3

... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin SOT353-1/SOT753 GND n. Functional description Table 4. Function table H = HIGH voltage level LOW voltage level don’t care high-impedance OFF-state Inputs Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 4

... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...

Page 5

... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C input I capacitance 74AHCT1G125 V HIGH-level input voltage V LOW-level input voltage V HIGH-level output voltage 8 LOW-level output voltage 8 OFF-state output current input leakage GND current 5.5 V ...

Page 6

... NXP Semiconductors Table 8. Dynamic characteristics GND = 0 V; For test circuit see Figure Symbol Parameter Conditions t enable time see disable time see dis power per buffer; PD dissipation pF MHz; L capacitance V = GND 74AHCT1G125 t propagation see pd delay enable time see ...

Page 7

... NXP Semiconductors Table 8. Dynamic characteristics GND = 0 V; For test circuit see Figure Symbol Parameter Conditions C power per buffer; PD dissipation pF MHz; L capacitance V = GND [ the same as t and PLH PHL t is the same as t and PZL PZH t is the same as t and t . dis ...

Page 8

... NXP Semiconductors OE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 8. Enable and disable times Table 9. Measurement point Type Inputs V I 74AHC1G125 GND 74AHCT1G125 GND to 3.0 V ...

Page 9

... NXP Semiconductors negative positive Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 9. Test circuit for measuring switching times Table 10. Test data Type Input ...

Page 10

... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 10 ...

Page 11

... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions UNIT 0.100 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT753 Fig 11. Package outline SOT753 (SC-74A) 74AHC_AHCT1G125_9 Product data sheet 74AHC1G125; 74AHCT1G125 scale 3.1 1.7 3.0 0.6 0.95 2 ...

Page 12

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 13

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 13 ...

Page 14

... NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID 74AHC_AHCT1G125_9 Modifications: 74AHC_AHCT1G125_8 Modifi ...

Page 15

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 16

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 14 Abbreviations ...

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