XC7SET32GV,125 NXP Semiconductors, XC7SET32GV,125 Datasheet
XC7SET32GV,125
Specifications of XC7SET32GV,125
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XC7SET32GV,125 Summary of contents
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XC7SET32 2-input OR gate Rev. 01 — 3 September 2009 1. General description XC7SET32 is a high-speed Si-gate CMOS device. It provides a 2-input OR function. 2. Features I Symmetrical output impedance I High noise immunity I ESD protection: N ...
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... NXP Semiconductors 4. Marking Table 2. Marking codes Type number XC7SET32GW XC7SET32GV [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning Fig 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin GND Functional description Table 4. Function table H = HIGH voltage level LOW voltage level Inputs Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage ...
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... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...
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... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V. For waveform see Figure Symbol Parameter Conditions t propagation A and delay see Figure power per buffer; PD dissipation pF MHz; L capacitance V = GND [ the same as t and PLH PHL [2] Typical values are measured used to determine the dynamic power dissipation P ...
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... NXP Semiconductors 12. Waveforms Measurement points are given in Fig 5. The input (A and B) to output (Y) propagation delays Table 9. Measurement points Type number Input V I XC7SET32 GND to 3.0 V Test data is given in Table 10. Definitions for test circuit Load capacitance including jig and probe capacitance. ...
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... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 7 ...
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... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions) UNIT 0.100 1.1 0.40 0.26 mm 0.013 0.9 0.25 0.10 OUTLINE VERSION IEC SOT753 Fig 8. Package outline SOT753 (SC-74A) XC7SET32_1 Product data sheet scale 3.1 1.7 3.0 0.6 0.95 2.7 1.3 2 ...
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... NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 12. Revision history Document ID Release date XC7SET32_1 20090903 XC7SET32_1 Product data sheet Data sheet status ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 14 Abbreviations ...