MC13783VK5 Freescale Semiconductor, MC13783VK5 Datasheet
MC13783VK5
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MC13783VK5 Summary of contents
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... Dual channel voice ADC improves intelligibility. Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2005–2009. All rights reserved. Document Number: MC13783 Rev. 3.5, 7/2009 MC13783 Package Information Plastic Package 10 × ...
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... USB FS/LS transceiver with OTG and CEA-936-A Carkit support • Touchscreen interface The main functions of the MC13783 are described in the following sections. A detailed block diagram is shown in Figure 1, on page 3. 2 Figure 1 shows the wide functionality of the MC13783, MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... Audio Internal BCL2 Bus Osc Interface SPI Result FS2 Registers RX2 TX2 32 kHz CLIA Crystal Core Control Logic, Timers, & Interrupts CLIB Osc Freescale Semiconductor Tri-Color Backlight Trickle Generation LED Drive LED Drive Thermal Warning Detection LOBAT A Control SPI Ref + Trigger ...
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... Dynamic voltage scaling is provided on each of the down converters. This allows under close processor control to adapt the output voltage of the converters to minimize processor current drain. The up, or boost, converter supplies the white backlight LEDs and the 4 MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... This oscillator is used for internal clocking, the control logic, and as a reference for the switcher PLL. The timekeeping includes time of day, calendar and alarm. The clock is put out to the processors for reference and deep sleep mode clocking. Freescale Semiconductor MC13783 Technical Data, Rev. 3.5 Introduction ...
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... Application supply voltage sense Driver output for battery path FET M3 Battery current sensing point 1 1. Battery positive terminal 2. Battery current sensing point 2 3. Battery supply voltage sense Selection of the mode of charging Selection of the mode of charging MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... EHV for Extended High Voltage (20 V) • HV for High Voltage (7.5 V) • EMV for Extended Medium Voltage (5.5 V) • MV for Medium Voltage (4.65 V) • LV for Low Voltage (3.1 V) Freescale Semiconductor Table 1. Pinout Listing (continued) Function Charger forced SE1 detection input Trickle LED driver output ...
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... Ground for switcher 2B SW2 mode configuration Switcher 3 input Switcher 3 output Switcher 3 feedback Ground for switcher 3 Power gate driver 1 enable Power gate driver 1 output Power gate driver 2 enable Power gate driver 2 output Input regulator audio MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... EHV for Extended High Voltage (20 V) • HV for High Voltage (7.5 V) • EMV for Extended Medium Voltage (5.5 V) • MV for Medium Voltage (4.65 V) • LV for Low Voltage (3.1 V) Freescale Semiconductor Table 1. Pinout Listing (continued) Function Output regulator audio Input regulator low voltage IO ...
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... Optional USB receiver processor interface data output (logic level version of D-) 2. Optional RS232 processor interface USB transceiver operation mode selection at power up 0 USB transceiver operation mode selection at power up 1 Bootmode enable for USB/RS232 interface Input for VBUS and VUSB regulators for USB on the go mode MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... EHV for Extended High Voltage (20 V) • HV for High Voltage (7.5 V) • EMV for Extended Medium Voltage (5.5 V) • MV for Medium Voltage (4.65 V) • LV for Low Voltage (3.1 V) Freescale Semiconductor Table 1. Pinout Listing (continued) Function When in common input configuration, shorted to CHRGRAW 1. USB transceiver cable interface VBUS 2 ...
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... Secondary SPI clock input Secondary SPI write input Secondary SPI read output Secondary SPI select input Interrupt to processor controlling the secondary SPI bus Ground for SPI interface Battery thermistor presence detect output ADC generic input channel 5, group 1 MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... EHV for Extended High Voltage (20 V) • HV for High Voltage (7.5 V) • EMV for Extended Medium Voltage (5.5 V) • MV for Medium Voltage (4.65 V) • LV for Low Voltage (3.1 V) Freescale Semiconductor Table 1. Pinout Listing (continued) Function ADC generic input channel 6, group 1 ADC generic input channel 7, group 1 ...
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... Low power receive output for accessories left channel General purpose receive input right channel General purpose receive input left channel Reference for audio amplifiers Reference for low noise audio bandgap Reference for voice CODEC MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... HV for High Voltage (7.5 V) • EMV for Extended Medium Voltage (5.5 V) • MV for Medium Voltage (4.65 V) • LV for Low Voltage (3.1 V) Freescale Semiconductor Table 1. Pinout Listing (continued) Function Reference for stereo DAC Connection for the stereo DAC PLL low pass filter. ...
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... MC13783 Technical Data, Rev. 3.5 Typ Max Units — +20 V — +20 V — +5.50 V — +4.65 V — +4.65 V ° — +85 C ° — +125 C ° — +150 C — — kV Max Unit 6 µA 45 µA 52 µA 91 µA 220 µA 1000 µA 9.9 mA 12.1 mA Freescale Semiconductor ...
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... Secondary processor SPI bus supply Both SPI ports are configured to utilize 32-bit serial data words, using 1 read/write bit, 6 address bits, 1 null bit, and 24 data bits. The SPI ports’ 64 registers correspond to the 6 address bits. Freescale Semiconductor on page 17 includes a description of the dual SPI interface. ...
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... LED Control 1 Audio LED Control 2 Audio Tx 54 LED Control 3 SSI Network 55 LED Control 4 Audio Codec 56 LED Control 5 57 Audio Stereo DAC Spare Audio Spare 58 Trim 0 ADC 0 59 Trim 1 ADC 1 60 Test 0 ADC 2 61 Test 1 ADC 3 62 Test 2 ADC 4 63 Test 3 Freescale Semiconductor ...
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... SEC correspond to both SPI interfaces. The below diagram and table summarize the SPI electrical and timing requirements. The SPI input and output levels are set independently via the PRIVCC and SECVCC pins by connecting those to the proper supply. Freescale Semiconductor Address3 Address2 ...
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... Figure 4. SPI Interface Timing Diagram Table 6. SPI Interface Timing Specifications Description 1 Condition — — Output sink 100 μA Output source 100 μA MC13783 Technical Data, Rev. 3.5 T sellow T selhld T rddis T min (ns Min Max Units 0.7*VCC VCC+0 0.3*VCC V 0 0.2 V VCC-0.2 VCC V Freescale Semiconductor ...
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... When the TOD counter is equal to the value in TODA and the DAY counter is equal to the value in DAYA, the TODAI interrupt will be generated. MC13783 makes it convenient to schedule multiple daily events, where a single list could be used skip any number of days. Freescale Semiconductor MC13783 Technical Data, Rev. 3.5 Functional Description 21 ...
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... PUMS1, PUMS2 and PUMS3. In total three different sequences and five different default voltage setting combinations are provided. At power up all regulators and switchers are sequentially enabled at equidistant steps of 2ms to limit the inrush current. 22 Table 8. MC13783 Operating Modes Description MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... Table 9 summarizes supply output voltages. Supply SW1A SW1B 0.900 - 1.675 steps, 1.700 - 2.200 in 100 mV steps SW2A SW2B SW3 5.0 / 5.5 VAUDIO 2.775 VIOHI 2.775 Freescale Semiconductor Battery Voltage and Current BP Control Vusb Boost Vbus Switcher Vvib Vsim Vmmc1 Vcam Vesim Vmmc2 ...
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... Vin = Vnom + 1V MC13783 Technical Data, Rev. 3.5 Load (mA) 150 0 200 50 50 350 350 350 350 Table 11 on page 25 lists characteristics Min Typ Max Vnom + 0.3 4.65 Vnom - 3% Vnom Vnom + 3% — — 0.20 — — — Freescale Semiconductor Units V V mV/mA µA µA dB ...
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... For reduced current drain in low power modes, parts of a processor may be power gated, that is to say, the supply to that part of the processor is disabled. To simplify the supply tree and to reduce the number of external components while maintaining flexibility, power gate switch drivers are included. Freescale Semiconductor Condition Used as a condition for all other parameters ...
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... I2S mode is similar to industry standard mode except that the serial data is delayed one BCL period. Data is received in a two's compliment format. A network mode is also available where the stereo 26 CDCFS[1:0]=10 Long Frame Sync Length = 16 Bit MC13783 Technical Data, Rev. 3.5 CDCFSINV=0 CDCBCLINV HIGH Z Don Care Freescale Semiconductor ...
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... Hz to 3.0 kHz (8 kHz sample rate) 4.3.2.2 D/A Converter The D/A portion of the voice CODEC converts 13-bit linear PCM words entering at a rate of 8 kHz and 16 kHz into analog audio signals. Prior to this D/A conversion, the audio signal is digitally band-pass filtered. Freescale Semiconductor Condition Min REFC-0. — ...
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... Includes idle tones 28 Condition Min REFC - — — Condition Min -0.5 — — MC13783 Technical Data, Rev. 3.5 Typ Max Units REFC + — — dB -78 -74 dBm0 — -50 dB Typ Max Units — +0.5 dB 0.2 0 — dB — — dB — -75 dB Freescale Semiconductor ...
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... BCL1 BCL2 FS1 FS2 STDCSSISEL Table 15. Stereo DAC Sample Rate Selection SPI Bits SR3 SR2 Freescale Semiconductor STDCSM=1 & STDCCLK=101 1 NR STDCCLK[3:0] MCL NS STDCSM STDCSM=0 NFS internal master clock MCLint Figure 7. Stereo DAC PLL Block Diagram SR1 SR0 FS N MCL 8000 ...
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... Source only with respect kHz Includes REFA noise CCITT psophometricly weighted MC13783 Technical Data, Rev. 3.5 N BCL B 4 1536k 2 2048k 2 3072k Min Typ Max Units 2.23 2.38 2.53 V 2.00 2.10 2.20 0 — 500 µA 90 — — dB — 1.5 3.0 µVrms Freescale Semiconductor ...
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... Gain ( 1.0 kHz Input Impedance ( Amc1L, Amc1R, Amc2 Atxin Gain (Atxin) TXIN to Voice Codec PSRR with respect – 10 kHz inputs AC grounded Input Noise input to REFA Freescale Semiconductor Detect Microphone Bias Amc1L Input PGAtxL Selector From RXINL Input Selector PGAtxR From RXINR Figure 8 ...
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... ALSPEN Left Detect Codec AhsR Right Phantom AHSREN Ground Codec AhsL Left Detect AHSLEN Codec ArxoutR Right ARXOUTREN Codec ArxoutL Left ARXOUTLEN To USB Freescale Semiconductor CDCOUT SPP SPM VINLSP LSPP LSPM GNDLSP LSPL HSR HSDET HSPGF HSPGS HSL HSLDET RXOUTR RXOUTL ...
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... THD (2 and 3 ) 1.0 kHz 1.0 kHz 1.0 kHz PSRR with respect – 20 kHz inputs AC grounded A Weighted Input Noise A weighted Including PGA Noise Load Impedance Freescale Semiconductor Condition Min — — Vin = 100 mVpp OUT V = 100 mVp OUT mVp OUT — — ...
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... Condition Min Vin = 100 mVpp -0.2 MC13783 Technical Data, Rev. 3.5 Typ Max Units — — — — — — 0.1 % — 0.1 % — — dB μV — 20 RMS Ω Typ Max Units 2 2.2 — 1.6 1.8 0 0.2 dB Freescale Semiconductor ...
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... PSRR with respect – 20 kHz inputs AC grounded A Weighted nd rd THD (2 and 3 ) gain = 0 dB External Load Impedance Output Noise gain = weighted kHz Per output (2) Freescale Semiconductor Condition OUT OUT RMS Table 21. Arx Performance Specifications Condition Vin = 100 mVpp — — OUT ...
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... The mode of operation for the charger interface is selected via the CHRGMOD1 and CHRGMOD0 pins as given in Table 22. CHRGMOD1 36 Example,” on page Example,” Operation,” on page 38 on page 38 Table 22. Charger Mode Selection CHRGMOD0 Charger Mode Hi Z GND Dual Path Single Path Hi Z VATLAS Serial Path MC13783 Technical Data, Rev. 3.5 37. on page 37 Freescale Semiconductor ...
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... Charge Path Block Regulator with Current Limit and OV 2 Protection To USB OVCTRL [1:0] Figure 10. Serial Path Interface Block Diagram Freescale Semiconductor CHRGMOD0 Charger Mode GND Separate Input Dual Path Hi Z Separate Input Single Path VATLAS Separate Input Serial Path GND Reserved ...
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... In practice, this means that if in Off state the coin cell is fully charged, the coin cell charger will only 38 Table 23. Voltage and Current Settings Set Points MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... General Purpose TSX1 / Touchscreen X-plate 1 13 General Purpose TSX2 / Touchscreen X-plate 2 14 General Purpose TSY1 / Touchscreen Y-plate 1 15 General Purpose TSY2 / Touchscreen Y-plate 2 Freescale Semiconductor Table 24. ADC Inputs Expected Input Range 2.50 – 4.65 V -50 - +50 mV 2.50 – 4. – – -250mV – +250 mV 0 – ...
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... The charge current is read by monitoring the voltage drop over the charge current sense resistor. 4.4.2.5.3 Battery Thermistor If a battery is equipped with a battery thermistor, its value can be read out via the ADC input ADIN5. The biasing and sensing circuit is entirely integrated and is only powered during the conversions. 40 MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... In this way, in total eight results are available per readout. ADC Trigger Freescale Semiconductor Table 25. Touchscreen Reading Sequence Signals sampled in Signals sampled in Resistive Mode Position Mode X plate resistance X position X plate resistance X position X plate resistance X position ...
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... BP and by SPI programming can be boost or VBUS supplied as well. 4.5.1.1.2 Detect Comparators are used to detect a valid VBUS, and to support the USB OTG session request protocol. 4.5.1.1.3 Transceiver The USB transceiver data flow is depicted in below diagram. The processor interface IO level is set to USBVCC. 42 MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... Via SPI bits DATSE0 and BIDIR, one of the four USB operating modes can be selected. However, when starting boot mode, there front SPI programming possible. The default operating mode is then determined by the setting of the UMOD pin as indicated in Freescale Semiconductor Tx Router SEO ...
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... USE0VM FSE0 UDP UDATVP (suspend) RSE0 MC13783 Technical Data, Rev. 3.5 Corresponding UMOD0/UMOD1 Setting → URXVP Don’t Care / To VATLAS URCVD → UDATVP To VATLAS / To Ground URCVD → URXVP To Ground / To Ground URCVD UDATVP (active) Open / To Ground → USE0VM Freescale Semiconductor ...
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... The lighting system of MC13783 is comprised of independent controlled circuitry for backlight drivers and tri-color LED drivers. This integration provides flexible backlighting and fun lighting for products featuring multi-zone and multi-color lighting implementations. utilization for a typical application. Freescale Semiconductor Figure 12 MC13783 Technical Data, Rev. 3.5 Functional Description ...
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... A boosted 46 BOOST Key Pad Main Aux Display BOOST Drive BL Drive Tri-Color Fun Aux Display Keypad Light Drive MC13783 IC Lighting System Figure 12. MC13783 Lighting System MC13783 Technical Data, Rev. 3.5 BOOST BOOST Freescale Semiconductor ...
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... Package Information The package style is a low profile BGA, pitch 0.5 mm, body 10 × 10mm, semi populated 19 × 19 matrix, ball count 247 including 4 sets of triple corner balls and 4 spare balls. Freescale Semiconductor Figure 13. Package Drawing MC13783 Technical Data, Rev. 3.5 Package Information ...
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... The charge level remains constant at the lower 70mA threshold through all battery voltage ranges. That is, there is no increased charge current at the 2.7V threshold. Standalone Trickle charging is not available for the SE1 = HIGH / Single Path charging case. 48 Table 27. Revision History Revision MC13783 Technical Data, Rev. 3.5 Freescale Semiconductor ...
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... Freescale Semiconductor NOTES MC13783 Technical Data, Rev. 3.5 49 ...
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... Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use ...