DSPIC30F2020-20E/SO Microchip Technology, DSPIC30F2020-20E/SO Datasheet
DSPIC30F2020-20E/SO
Specifications of DSPIC30F2020-20E/SO
Available stocks
Related parts for DSPIC30F2020-20E/SO
DSPIC30F2020-20E/SO Summary of contents
Page 1
... Family Reference Manual (DS70046) The exceptions to the specifications in the documents listed above are described in this section. These exceptions are described for the devices listed below: • dsPIC30F1010 • dsPIC30F2020 • dsPIC33F2023 dsPIC30F1010/202X Rev. A2 silicon is identified by performing a “Reset and Connect” operation to the ® ...
Page 2
... Sleep may also increase beyond the specifications listed in the device data sheet. 35. PWM Module The PWM module may not temperatures below -20ºC. 36. PWM Module In Push-Pull mode, with immediate updates enabled, the PWM pins may become swapped. © 2008 Microchip Technology Inc. operate at ...
Page 3
... The SPIxCON1 DISSCK bit does not influence port functionality Module The BCL bit in I2CSTAT can be cleared only with 16-bit operation and can be corrupted with 1-bit or 8-bit operations on I2CSTAT. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 2 42 Module: 10-bit addressing mode 2 When the I C module is configured for 10-bit ...
Page 4
... PWMxH/L output pin. The GPIO module must be setup in advance for the desired override output states, and the pins must be configured as digital outputs. This includes setting the PORTx and TRISx registers correctly, which correspond to the PWMxH and PWMxL pins. © 2008 Microchip Technology Inc. ...
Page 5
... EQUATION 1: PWMxH = (OVRDAT<1>) AND (CLDAT<1>) AND (FLTDAT<1> AND 0 AND PWMxL = (OVRDAT<0>) AND (CLDAT<0>) AND (FLTDAT<0> AND 1 AND © 2008 Microchip Technology Inc. dsPIC30F1010/202X 6. Module: PWM Override Priority The “dsPIC30F1010/202X Family Data Sheet” (DS70178) states the priority of PWMx pin ownership as: • ...
Page 6
... PENDx in the ADCPCx ⋅ 100 register should be used to determine when a conversion is completed interrupt based approach, the PxRDY bits get set when the conversion is complete. This bit must be cleared in the ADC Interrupt Service Routine in order to enable future interrupts. Trigger © 2008 Microchip Technology Inc. ...
Page 7
... Order = 0 and SEQSAMP = 1. This configuration allows for accurate conversion of the analog channels which use the shared sample and hold circuit. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 13. Module: Current Reset Mode Setting the XPRES bit in the PWMCONx register should enable a current-limit source to reset the PWM period in Independent Time Base mode ...
Page 8
... If FRMDLY = 0, no work around is needed. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. © 2008 Microchip Technology Inc. of the frame ...
Page 9
... The OERR bit may also be set. After reading the UART receive buffer, UxRXREG, four times to clear the FIFO, clear both the OERR and UxRXIF bits in software. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 22. Module: UART Module UART receptions may be corrupted if the Baud Rate Generator (BRGH) is set up for 4x mode (BRGH = 1) ...
Page 10
... In future silicon revisions, the D_A bit will get set on a slave write to I2CxTRN. Work around Use the D_A status bit only for determining slave reception status and not slave transmission status Module 2 C Module 2 C Module 2 C Module © 2008 Microchip Technology Inc. ...
Page 11
... Write 1st password mov.b w1, [w4] ; Write 2nd password mov.b w2, [w4] ; Write OSWEN bit return © 2008 Microchip Technology Inc. dsPIC30F1010/202X FIGURE 1: drops below DD +5V *Any commercially available BOR circuit can be used in this configuration. Refer to the BOR circuit manufacturer’s data sheet for exact circuit configuration ...
Page 12
... GotoSleep( ) function call. This ensures that the device continues executing the correct code sequence after waking up from Sleep mode. Example 3 demonstrates the described above would apply to a dsPIC30F2023 device. © 2008 Microchip Technology Inc. would be or work around ...
Page 13
... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2008 Microchip Technology Inc. dsPIC30F1010/202X ; Ensure flag is reset ; Return from Interrupt Service Routine Work around 3: Instead of executing a PWRSAV #0 instruction to ...
Page 14
... Slave enter into Read mode and both of them transmit the data. The resultant data will be the ANDing of the two transmissions. Work around Use different addresses including the higher two bits (A10 and A9) for different modules. C Module C Module 2 C devices on the bus, one of © 2008 Microchip Technology Inc. ...
Page 15
... The error bits will not be set after this occurs. Work around None. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 46. Module: Module: PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of an PSV page ...
Page 16
... Added silicon issues 35 (PWM Module), 36 (PWM Module), 37 (Power Supply PWM), 38 (UART Module), 39 (UART Module), 40 (SPI Module and Module). Revision D (7/2008) Updated issue 35 (PWM Module) and added silicon 2 2 issues Module Module), 45 (UART 2 (FIFO Error Flags) and Module). DS80319D-page Module), © 2008 Microchip Technology Inc. ...
Page 17
... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
Page 18
... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...