AM29F160DB-90EF Spansion Inc., AM29F160DB-90EF Datasheet - Page 27

• Manufacturer Part Number: AM29F160DB-90EF
• Description: IC, FLASH, 16MBIT, 90NS, TSOP-48
• Manufacturer: Spansion Inc.

Specifications of AM29F160DB-90EF

• Memory Type: Flash
• Memory Size: 16Mbit
• Memory Configuration: 2M X 8 / 1M X 16
• Ic Interface Type: Parallel
• Access Time: 90ns
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: TSOP
• No. Of Pins: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

toggling, the device successfully completed the
program or erase operation. If it is still toggling, the
device did not complete the operation successfully, and
the system must write the reset command to return to
reading array data.
The remaining scenario is that the system initially de-
termines that the toggle bit is toggling and DQ5 has not
gone high. The system may continue to monitor the
toggle bit and DQ5 through successive read cycles, de-
termining the status as described in the previous para-
graph. Alternatively, it may choose to perform other
system tasks. In this case, the system must start at the
beginning of the algorithm when it returns to determine
the status of the operation (top of
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time ex-
ceeded a specified internal pulse count limit. Under
these conditions DQ5 produces a “1.” This is a failure
condition that indicates the program or erase cycle was
not successfully completed.
The DQ5 failure condition may appear if the system
tries to program a “1” to a location that is previously pro-
grammed to “0.” Only an erase operation can change
a “0” back to a “1.” Under this condition, the device
halts the operation, and when the operation exceeds
the timing limits, DQ5 produces a “1.”
Under both these conditions, the system must issue the
reset command to return the device to reading array
data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the
system may read DQ3 to determine whether or not an
erase operation begun. (The sector erase timer does
not apply to the chip erase command.) If additional
sectors are selected for erasure, the entire time-out
also applies after each additional sector erase com-
mand. When the time-out is complete, DQ3 switches
from “0” to “1.” The system may ignore DQ3 if the sys-
tem can guarantee that the time between additional
sector erase commands is always less than 50 µs.
See also the
page 20
After the sector erase command sequence is written,
the system should read the status on DQ7 (Data# Poll-
ing) or DQ6 (Toggle Bit I) to ensure the device accepted
the command sequence, and then read DQ3. If DQ3 is
“1”, the internally controlled erase cycle started; all fur-
ther commands (other than Erase Suspend) are ig-
nored until the erase operation is complete. If DQ3 is
“0”, the device accepts additional sector erase com-
April 23, 2010 Am29F160D_00_D10
section.
Sector Erase Command Sequence‚ on
Figure
6).
D A T A S H E E T
Am29F160D
mands. To ensure the command is accepted, the sys-
tem software should check the status of DQ3 prior to
and following each subsequent sector erase command.
If DQ3 is high on the second status check, the last com-
mand might not have been accepted.
page 26
Notes:
1. Read toggle bit twice to determine whether or not it is
2. Recheck toggle bit because it may stop toggling as DQ5
toggling. See text.
changes to “1”. See text.
No
shows the outputs for DQ3.
Figure 6. Toggle Bit Algorithm
Complete, Write
Reset Command
Read DQ7–DQ0
Read DQ7–DQ0
Read DQ7–DQ0
Program/Erase
Operation Not
Toggle Bit
Toggle Bit
= Toggle?
DQ5 = 1?
= Toggle?
START
Twice
Yes
Yes
Yes
(Notes
1, 2)
(Note 1)
Operation Complete
No
No
Program/Erase
Table 10 on
25