PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 164

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ64GB004 FAMILY
14.3
In PWM mode, the output compare module can be
configured for edge-aligned or center-aligned pulse
waveform generation. All PWM operations are
double-buffered (buffer registers are internal to the
module and are not mapped into SFR space).
To configure the output compare module for
edge-aligned PWM operation:
1.
2.
3.
4.
FIGURE 14-2:
DS39940D-page 164
Trigger and
Sync Sources
OC Clock
Sources
Note 1: The OCx outputs must be assigned to an available RPn pin before use. Please see Section 10.4 “Peripheral Pin
Configure the OCx output for one of the
available Peripheral Pin Select pins.
Calculate the desired on-time and load it into the
OCxR register.
Calculate the desired period and load it into the
OCxRS register.
Select the current OCx as the synchronization
source by writing 0x1F to SYNCSEL<4:0>
(OCxCON2<4:0>)
(OCxCON2<7>).
Pulse-Width Modulation (PWM)
Mode
Select (PPS)” for more information.
SYNCSELx
TRIGSTAT
TRIGMODE
OCTSELx
OCTRIG
Trigger and
Sync Logic
OUTPUT COMPARE BLOCK DIAGRAM
(DOUBLE-BUFFERED, 16-BIT PWM MODE)
Clock
Select
and
Reset
‘0’
Match Event
Increment
Reset
to
OCxR and DCB<1:0> Buffers
OCTRIG
OCxR and DCB<1:0>
OCxRS Buffer
Comparator
Comparator
OCxCON1
OCxCON2
OCxTMR
Preliminary
OCxRS
Rollover/Reset
Rollover/Reset
5.
6.
7.
8.
Match
Event
Match
Event
Rollover
Note:
Select a clock source by writing to the
OCTSEL2<2:0> (OCxCON1<12:10>) bits.
Enable interrupts, if required, for the timer and
output compare modules. The output compare
interrupt is required for PWM Fault pin utilization.
Select the desired PWM mode in the OCM<2:0>
(OCxCON1<2:0>) bits.
If a timer is selected as a clock source, set the
TMRy prescale value and enable the time base by
setting the TON (TxCON<15>) bit.
This peripheral contains input and output
functions that may need to be configured
by the Peripheral Pin Select. See
Section 10.4 “Peripheral Pin Select
(PPS)” for more information.
OC Output Timing
and Fault Logic
OCx Interrupt
OCMx
OCINV
OCTRIS
FLTOUT
FLTTRIEN
FLTMD
ENFLTx
OCFLTx
DCB<1:0>
 2010 Microchip Technology Inc.
OCFA/OCFB/CxOUT
OCx Pin
(1)