PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 344

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ64GB004 FAMILY
CPU
CRC
CTMU
Customer Change Notification Service ............................. 348
Customer Notification Service........................................... 348
Customer Support ............................................................. 348
D
Data Memory
DC Characteristics
Deep Sleep BOR (DSBOR) ................................................ 67
Deep Sleep Watchdog Timer (DSWDT) ........................... 289
Development Support ....................................................... 293
DISVREG Pin.................................................................... 287
Doze Mode........................................................................ 125
E
Electrical Characteristics
Equations
Errata .................................................................................... 8
Examples
DS39940D-page 344
Arithmetic Logic Unit (ALU)......................................... 29
Clocking Scheme ...................................................... 108
Control Registers ........................................................ 28
Core Registers ............................................................ 27
Programmer’s Model................................................... 25
Registers ................................................................... 255
Typical Operation ...................................................... 255
User Interface ........................................................... 254
Measuring Capacitance ............................................ 275
Measuring Time ........................................................ 276
Pulse Delay and Generation ..................................... 276
Address Space............................................................ 33
Memory Map ............................................................... 33
Near Data Space ........................................................ 34
SFR Space.................................................................. 34
Software Stack ............................................................ 50
Space Organization and Alignment ............................ 34
Comparator Specifications ........................................ 318
Comparator Voltage Reference ................................ 318
I/O Pin Input Specifications ....................................... 316
I/O Pin Output Specifications .................................... 317
Idle Current ............................................................... 311
Internal Voltage Regulator ........................................ 318
Operating Current ..................................................... 309
Power-Down Base Current ....................................... 313
Power-Down Peripheral Module Current (I
Program Memory ...................................................... 317
Temperature and Voltage Specifications .................. 308
Absolute Maximum Ratings ...................................... 305
Thermal Conditions ................................................... 307
V/F Graphs................................................................ 306
A/D Conversion Clock Period ................................... 267
Baud Rate Reload Calculation .................................. 183
Calculating the PWM Period ..................................... 165
Calculation for Maximum PWM Resolution............... 165
Estimating USB Transceiver Current
Relationship Between Device and SPI
UART Baud Rate with BRGH = 0 ............................. 190
UART Baud Rate with BRGH = 1 ............................. 190
Baud Rate Error Calculation (BRGH = 0) ................. 190
Data .................................................................. 254
Polynomial ........................................................ 254
Consumption..................................................... 201
Clock Speed...................................................... 180
PD
) .......... 314
F
Flash Configuration Words ................................. 32, 279–285
Flash Program Memory ...................................................... 55
I
I/O Ports
I
Input Capture
Input Capture with Dedicated Timers ............................... 157
Instruction Set
Instruction-Based Power-Saving Modes........................... 117
Inter-Integrated Circuit. See I
Internet Address ............................................................... 348
Interrupt Service Routine (ISR)......................................... 106
Interrupt Vector Table (IVT) ................................................ 69
Interrupts
J
JTAG Interface.................................................................. 291
M
Microchip Internet Web Site.............................................. 348
MPLAB ASM30 Assembler, Linker, Librarian ................... 294
MPLAB Integrated Development Environment Software.. 293
MPLAB PM3 Device Programmer .................................... 296
MPLAB REAL ICE In-Circuit Emulator System ................ 295
MPLINK Object Linker/MPLIB Object Librarian ................ 294
2
C
and Table Instructions ................................................ 55
Enhanced ICSP Operation ......................................... 56
JTAG Operation.......................................................... 56
Programming Algorithm .............................................. 58
RTSP Operation ......................................................... 56
Single-Word Programming ......................................... 61
Analog Input Voltage Considerations ....................... 128
Analog Port Pins Configuration................................. 128
Input Change Notification ......................................... 129
Open-Drain Configuration......................................... 128
Parallel (PIO) ............................................................ 127
Peripheral Pin Select ................................................ 129
Pull-ups and Pull-Downs........................................... 129
Clock Rates .............................................................. 183
Communicating as Master in a Single
Reserved Addresses ................................................ 183
Setting Baud Rate When Operating as
Slave Address Masking ............................................ 183
32-Bit Mode .............................................................. 158
Operations ................................................................ 158
Synchronous and Trigger Modes.............................. 157
Overview................................................................... 299
Summary .................................................................. 297
Symbols Used in Opcode Descriptions .................... 298
Deep Sleep ............................................................... 118
Idle ............................................................................ 118
Sleep ........................................................................ 117
and Reset Sequence .................................................. 69
Control and Status Registers...................................... 72
Implemented Vectors.................................................. 71
Setup and Service Procedures ................................. 106
Trap Vectors ............................................................... 70
Vector Table ............................................................... 70
Master Environment ......................................... 181
Bus Master ....................................................... 183
 2010 Microchip Technology Inc.
2
C. ...................................... 181