SAF-C505CA-LM Infineon Technologies, SAF-C505CA-LM Datasheet - Page 11

IC, 8BIT MCU ROM/ROMLESS, SMD

SAF-C505CA-LM

Manufacturer Part Number
SAF-C505CA-LM
Description
IC, 8BIT MCU ROM/ROMLESS, SMD
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF-C505CA-LM

No. Of I/o's
34
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
MQFP
Supply Voltage
RoHS Compliant
Core Size
8bit
Oscillator Type
External, Internal
Controller Family/series
C500
Peripherals
ADC
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAF-C505CA-LM
Manufacturer:
INFINEON
Quantity:
5 510
Part Number:
SAF-C505CA-LM
Manufacturer:
BB
Quantity:
5 510
Part Number:
SAF-C505CA-LM
Manufacturer:
INFIENON
Quantity:
20 000
Part Number:
SAF-C505CA-LM CA
Manufacturer:
INFINEON
Quantity:
1 554
Part Number:
SAF-C505CA-LM CA
Manufacturer:
Infineon Technologies
Quantity:
10 000
Part Number:
SAF-C505CA-LM CA
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Company:
Part Number:
SAF-C505CA-LM CA
Quantity:
800
Company:
Part Number:
SAF-C505CA-LM CA
Quantity:
800
Table 2
Pin Definitions and Functions (cont’d)
Symbol
RESET
P3.0-P3.7
*) I = Input
Data Sheet
O = Output
4
5, 7-13
5
7
8
9
10
11
12
13
Pin Number
I/O
*)
I
I/O
Function
RESET
A high level on this pin for two machine cycle while the
oscillator is running resets the device. An internal diffused
resistor to V
external capacitor to V
Port 3
is an 8-bit quasi-bidirectional port with internal pull-up
arrangement. Port 3 pins that have 1’s written to them are
pulled high by the internal pull-up transistors and in that
state can be used as inputs. As inputs, port 3 pins being
externally pulled low will source current (I
characteristics) because of the internal pullup transistors.
The output latch corresponding to a secondary function
must be programmed to a one (1) for that function to operate
(except for TxD and WR). The secondary functions are
assigned to the pins of port 3 as follows:
P3.0 / RxD
P3.1 / TxD
P3.2 / INT0
P3.3 / INT1
P3.4 / T0
P3.5 / T1
P3.6 / WR
P3.7 / RD
7
SS
permits power-on reset using only an
Receiver data input (asynch.) or data
input/output (synch.) of serial interface
Transmitter data output (asynch.) or
clock output (synch.) of serial interface
External interrupt 0 input / timer 0 gate
control input
External interrupt 1 input / timer 1 gate
control input
Timer 0 counter input
Timer 1 counter input
WR control output; latches the data
byte from port 0 into the external data
memory
RD control output; enables the external
data memory
C505/C505C/C505A/C505CA
DD
.
IL
, in the DC
12.00

Related parts for SAF-C505CA-LM