SAF-C505CA-LM Infineon Technologies, SAF-C505CA-LM Datasheet - Page 32

IC, 8BIT MCU ROM/ROMLESS, SMD

SAF-C505CA-LM

Manufacturer Part Number
SAF-C505CA-LM
Description
IC, 8BIT MCU ROM/ROMLESS, SMD
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAF-C505CA-LM

No. Of I/o's
34
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm Channels
4
Digital Ic Case Style
MQFP
Supply Voltage
RoHS Compliant
Core Size
8bit
Oscillator Type
External, Internal
Controller Family/series
C500
Peripherals
ADC
Rohs Compliant
Yes

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Timer / Counter 0 and 1
Timer/Counter 0 and 1 can be used in four operating modes as listed in
Table 6
Timer/Counter 0 and 1 Operating Modes
Mode
0
1
2
3
In the “timer” function (C/T = ‘0’) the register is incremented every machine cycle. Therefore the
count rate is
In the “counter” function the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin (P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a
falling edge the max. count rate is
programmed to function as a gate to facilitate pulse width measurements.
input clock logic.
Figure 10
Timer/Counter 0 and 1 Input Clock Logic
Data Sheet
Description
8-bit timer/counter with a
divide-by-32 prescaler
16-bit timer/counter
8-bit timer/counter with
8-bit autoreload
Timer/counter 0 used as one
8-bit timer/counter and one
8-bit timer
Timer 1 stops
f
OSC
P3.4/T0
P3.5/T1
Gate
(TMOD)
P3.2/INT0
P3.3/INT1
/6.
=1
OSC
f
OSC
/12. External inputs INT0 and INT1 (P3.2, P3.3) can be
M1
÷
<
_
0
0
1
1
6
1
TMOD
TR0
TR1
28
M0
0
1
0
1
C/T = 0
C/T = 1
&
f
C505/C505C/C505A/C505CA
internal
OSC
f
OSC
/6x32
Control
/6
Input Clock
Table 6
f
Timer 0/1
Input Clock
Figure 10
OSC
MCS03117
/6
external (max)
:
f
OSC
f
OSC
illustrates the
/12x32
/12
12.00

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