P89LPC938FDH NXP Semiconductors, P89LPC938FDH Datasheet - Page 9

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P89LPC938FDH

Manufacturer Part Number
P89LPC938FDH
Description
MCU 8BIT 80C51 8K FLASH, TSSOP28
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC938FDH

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
26
Program Memory Size
8KB
Eeprom Memory Size
512Byte
Ram Memory Size
768Byte
Cpu Speed
18MHz
Oscillator Type
External,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Philips Semiconductors
Table 3:
9397 750 14051
Product data sheet
Symbol
P1.3/INT0/SDA 11
P1.4/INT1
P1.5/RST
P1.6/OCB
P1.7/OCC/
AD04
P2.0 to P2.7
P2.0/ICB/AD07 1
P2.1/OCD/
AD06
P2.2/MOSI
P2.3/MISO
Pin description
Pin
TSSOP28,
PLCC28
10
6
5
4
2
13
14
…continued
HVQFN28
7
6
2
1
28
25
26
9
10
Type Description
I/O
I
I/O
I
I
I
I
I/O
O
I/O
O
I
I/O
I/O
I
I
I/O
O
I
I/O
I/O
I/O
I/O
Rev. 01 — 25 February 2005
P1.3 — Port 1 bit 3 (open-drain when used as output).
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4.
INT1 — External interrupt 1 input.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address 0. Also used
during a power-on sequence to force In-System Programming mode.
When using an oscillator frequency above 12 MHz, the reset input
function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until V
specified level. When system power is removed V
the minimum specified operating voltage. When using an oscillator
frequency above 12 MHz, in some applications, an external
brownout detect circuit may be required to hold the device in reset
when V
P1.6 — Port 1 bit 6.
OCB — Output Compare B.
P1.7 — Port 1 bit 7.
OCC — Output Compare C.
AD04 — ADC0 channel 4 analog input.
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type.
During reset Port 2 latches are configured in the input only mode with the
internal pull-up disabled. The operation of Port 2 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to
and
All pins have Schmitt triggered inputs.
Port 2 also provides various special functions as described below:
P2.0 — Port 2 bit 0.
ICB — Input Capture B.
AD07 — ADC0 channel 7 analog input.
P2.1 — Port 2 bit 1.
OCD — Output Compare D.
AD06 — ADC0 channel 6 analog input.
P2.2 — Port 2 bit 2.
MOSI — SPI master out slave in. When configured as master, this pin is
output; when configured as slave, this pin is input.
P2.3 — Port 2 bit 3.
MISO — When configured as master, this pin is input, when configured
as slave, this pin is output.
Table 10 “DC electrical characteristics”
DD
2
C serial data input/output.
falls below the minimum specified operating range.
8-bit microcontroller with 10-bit A/D converter
Section 7.13.1 “Port configurations”
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
for details.
DD
P89LPC938
has reached its
DD
will fall below
9 of 68

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