SST39VF1681-70-4C-EKE SILICON STORAGE TECHNOLOGY, SST39VF1681-70-4C-EKE Datasheet

IC, 16M FLASH MEMORY, 2KWORD SECTOR

SST39VF1681-70-4C-EKE

Manufacturer Part Number
SST39VF1681-70-4C-EKE
Description
IC, 16M FLASH MEMORY, 2KWORD SECTOR
Manufacturer
SILICON STORAGE TECHNOLOGY
Datasheet

Specifications of SST39VF1681-70-4C-EKE

Memory Size
16Mbit
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
No. Of Pins
48
Svhc
No SVHC (18-Jun-2010)
Access Time
70ns
Interface
X8 MPF+
Memory Configuration
2M X 8bit
Memory Type
Flash - NOR
Interface Type
CFI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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FEATURES:
• Organized as 2M x8
• Single Voltage Read and Write Operations
• Superior Reliability
• Low Power Consumption (typical values at 5 MHz)
• Hardware Block-Protection/WP# Input Pin
• Sector-Erase Capability
• Block-Erase Capability
• Chip-Erase Capability
• Erase-Suspend/Erase-Resume Capabilities
• Hardware Reset Pin (RST#)
PRODUCT DESCRIPTION
The SST39VF168x devices are 2M x8 CMOS Multi-Pur-
pose Flash Plus (MPF+) manufactured with SST’s propri-
etary, high performance CMOS SuperFlash technology.
The split-gate cell design and thick-oxide tunneling injec-
tor attain better reliability and manufacturability compared
with alternate approaches. The SST39VF168x write (Pro-
gram or Erase) with a 2.7-3.6V power supply. These
devices conform to JEDEC standard pinouts for x8 mem-
ories.
Featuring
SST39VF168x devices provide a typical Byte-Program
time of 7 µsec. These devices use Toggle Bit or Data# Poll-
ing to indicate the completion of Program operation. To pro-
tect against inadvertent write, they have on-chip hardware
and Software Data Protection schemes. Designed, manu-
factured, and tested for a wide spectrum of applications,
these devices are offered with a guaranteed typical endur-
ance of 100,000 cycles. Data retention is rated at greater
than 100 years.
The SST39VF168x devices are suited for applications that
require convenient and economical updating of program,
configuration, or data memory. For all system applications,
©2003 Silicon Storage Technology, Inc.
S71243-03-000
1
– 2.7-3.6V
– Endurance: 100,000 Cycles (Typical)
– Greater than 100 years Data Retention
– Active Current: 9 mA (typical)
– Standby Current: 3 µA (typical)
– Auto Low Power Mode: 3 µA (typical)
– Top Block-Protection (top 64 KByte)
– Bottom Block-Protection (bottom 64 KByte)
– Uniform 4 KByte sectors
– Uniform 64 KByte blocks
for SST39VF1682
for SST39VF1681
high
16 Mbit (x8) Multi-Purpose Flash Plus
performance
11/03
SST39VF1681 / 16822.7V 16Mb (x8) MPF+ memories
SST39VF1681 / SST39VF1682
Byte-Program,
the
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
• Security-ID Feature
• Fast Read Access Time:
• Latched Address and Data
• Fast Erase and Byte-Program:
• Automatic Write Timing
• End-of-Write Detection
• CMOS I/O Compatibility
• JEDEC Standard
• Packages Available
they significantly improve performance and reliability, while
lowering power consumption. They inherently use less
energy during Erase and Program than alternative flash
technologies. The total energy consumed is a function of
the applied voltage, current, and time of application. Since
for any given voltage range, the SuperFlash technology
uses less current to program and has a shorter erase time,
the total energy consumed during any Erase or Program
operation is less than alternative flash technologies. These
devices also improve flexibility while lowering the cost for
program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. Therefore the system software
or hardware does not have to be modified or de-rated as is
necessary with alternative flash technologies, whose
Erase and Program times increase with accumulated
Erase/Program cycles.
To meet high density, surface mount requirements, the
SST39VF168x are offered in both 48-ball TFBGA and
48-lead TSOP packages. See Figures 1 and 2 for pin
assignments.
– SST: 128 bits; User: 128 bits
– 70 ns
– 90 ns
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 40 ms (typical)
– Byte-Program Time: 7 µs (typical)
– Internal V
– Toggle Bits
– Data# Polling
– Flash EEPROM Pinouts and Command sets
– 48-ball TFBGA (6mm x 8mm)
– 48-lead TSOP (12mm x 20mm)
PP
Generation
These specifications are subject to change without notice.
MPF is a trademark of Silicon Storage Technology, Inc.
Preliminary Specifications

Related parts for SST39VF1681-70-4C-EKE

SST39VF1681-70-4C-EKE Summary of contents

Page 1

... Mbit (x8) Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 SST39VF1681 / 16822.7V 16Mb (x8) MPF+ memories FEATURES: • Organized • Single Voltage Read and Write Operations – 2.7-3.6V • Superior Reliability – Endurance: 100,000 Cycles (Typical) – Greater than 100 years Data Retention • Low Power Consumption (typical values at 5 MHz) – ...

Page 2

... Data# Polling and Toggle Bit. During the internal Program operation, the host is free to perform additional tasks. Any ©2003 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 commands issued during the internal Program operation are ignored. During the command sequence, WP# should be statically held high or low. ...

Page 3

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 Chip-Erase Operation The SST39VF168x provide a Chip-Erase operation, which allows the user to erase the entire memory array to the “1” state. This is useful when the entire device must be quickly erased. The Chip-Erase operation is initiated by executing a six- byte command sequence with Chip-Erase command (10H) at address AAAH in the last byte sequence ...

Page 4

... Hardware Block Protection The SST39VF1682 supports top hardware block protec- tion, which protects the top 64 KByte block of the device. The SST39VF1681 supports bottom hardware block pro- tection, which protects the bottom 64 KByte block of the device. The Boot Block address ranges are described in Table 2 ...

Page 5

... SST39VF1681 / SST39VF1682 Product Identification The Product Identification mode identifies the devices as the SST39VF1681 and SST39VF1682, and manufacturer as SST. Users may use the software Product Identifica- tion operation to identify the part (i.e., using the device ID) when using multiple manufacturers in the same socket. ...

Page 6

... A20 DQ5 WP# A19 NC DQ2 A18 A7 A6 DQ0 CE# OE 48- TFBGA LEAD Standard Pinout 9 10 Top View 11 12 Die 1243 48-tsop P2.0 48- TSOP LEAD 6 SST39VF1681 / SST39VF1682 V SS DQ6 DQ4 DQ3 DQ1 A17 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 S71243-03-000 11/03 ...

Page 7

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 TABLE ESCRIPTION Symbol Pin Name Functions Address Inputs To provide memory addresses During Sector-Erase A During Block-Erase A DQ -DQ Data Input/output To output data during Read cycles and receive input data during Write cycles Data is internally latched during a Write cycle. ...

Page 8

... AAAH A5H BA 555H 55H AAAH 85H XXH 555H 55H AAAH 90H 555H 55H AAAH 98H 555H 55H AAAH F0H , but no other value, for Command sequence for SST39VF1681/1682. address lines address lines - (Address range = 00000H to 0000FH (Address range = 00010H to 0001FH Locked ...

Page 9

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 TABLE 7: CFI Q I UERY DENTIFICATION Address Data Data 10H 51H Query Unique ASCII string “QRY” 11H 52H 12H 59H 13H 01H Primary OEM command set 14H 07H 15H 00H Address for Primary Extended Table ...

Page 10

... Range Ambient Temp Commercial 0°C to +70°C Industrial -40°C to +85° ONDITIONS OF EST Input Rise/Fall Time . . . . . . . . . . . . . . 5 ns Output Load . . . . . . . . . . . . . . . . . . . . C See Figures 17 and 18 ©2003 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus V DD 2.7-3.6V 2.7-3. SST39VF1681 / SST39VF1682 DD DD S71243-03-000 +0.5V +2.0V 11/03 ...

Page 11

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 TABLE 10 PERATING HARACTERISTICS Symbol Parameter I Power Supply Current DD 3 Read Program and Erase I Standby V Current Auto Low Power ALP I Input Leakage Current LI I Input Leakage Current LIW on WP# pin and RST# I Output Leakage Current LO V Input Low Voltage ...

Page 12

... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2003 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus V = 2.7-3.6V ARAMETERS DD SST39VF168x-70 Min Max 500 IMING ARAMETERS 12 SST39VF1681 / SST39VF1682 SST39VF168x-90 Min Max 500 50 20 ...

Page 13

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 ADDRESS A MS-0 CE# OE WE# HIGH-Z DQ 15-0 Note FIGURE EAD YCLE IMING AAA ADDRESS OE# CE# DQ 7-0 AA SW0 Note Most Significant Address for SST39VF168x MS 20 WP# must be held in proper logic state (V X can FIGURE 4: WE# C ONTROLLED ©2003 Silicon Storage Technology, Inc. ...

Page 14

... SW0 SW1 SW2 BYTE (ADDR/DATA µs prior to and 1 µs after the command sequence ROGRAM YCLE IMING IAGRAM OEH T OE DATA# = Most Significant Address for SST39VF168x IAGRAM 14 SST39VF1681 / SST39VF1682 INTERNAL PROGRAM OPERATION STARTS OES DATA# DATA 1243 F05.0 S71243-03-000 1243 F04.0 11/03 ...

Page 15

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 ADDRESS A MS-0 CE# OE# WE# DQ and Note FIGURE OGGLE ITS IMING AAA ADDRESS A MS-0 CE# OE WE# DQ 7-0 AA SW0 Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are interchangeable as long as minimum timings are meet. (See Table 15.) ...

Page 16

... ONTROLLED ©2003 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SIX-BYTE CODE FOR BLOCK-ERASE 555 AAA AAA 555 SW1 SW2 SW3 SW4 µs prior to and 1 µs after the command sequence LOCK RASE IMING IAGRAM 16 SST39VF1681 / SST39VF1682 1243 F08.0 SW5 S71243-03-000 11/03 ...

Page 17

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 ADDRESS A MS-0 AAA CE# OE WE# DQ 7-0 AA SW0 Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are interchangeable as long as minimum timings are meet. (See Table 15 Sector Address Most Significant Address for SST39VF168x MS 20 ...

Page 18

... IL IH but no other value. R EAD CFI QUERY ENTRY 555 AAA T IDA T WPH 55 98 SW1 SW2 µs prior to and 1 µs after the command sequence but no other value. R EAD 18 SST39VF1681 / SST39VF1682 0001 Device S71243-03-000 1243 F10.1 1243 F11.1 11/03 ...

Page 19

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 THREE-BYTE SEQUENCE FOR SOFTWARE ID EXIT AND RESET AAA ADDRESS A MS-0 DQ 7-0 AA CE# OE WE# SW0 Note Most Significant Address for SST39VF168x MS 20 WP# must be held in proper logic state (V X can IH, FIGURE 13 OFTWARE XIT THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ...

Page 20

... T RP RST# CE#/OE# FIGURE 15: RST IMING IAGRAM T RP RST# CE#/OE# FIGURE 16: RST IMING IAGRAM ©2003 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 T RHR (W HEN NO INTERNAL OPERATION IS IN PROGRESS T RY End-of-Write Detection (Toggle-Bit URING ROGRAM OR RASE OPERATION 20 1243 F14.0 ) 1243 F15 ...

Page 21

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 V IHT INPUT V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 FIGURE 17 NPUT UTPUT TO DUT FIGURE 18 EST OAD XAMPLE ©2003 Silicon Storage Technology, Inc REFERENCE POINTS ) for a logic “1” and V (0 ...

Page 22

... Preliminary Specifications FIGURE 19 YTE ROGRAM LGORITHM ©2003 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 Start Load data: AAH Address: AAAH Load data: 55H Address: 555H Load data: A0H Address: AAAH Load Word Address/Word Data Wait for end of Program ( ...

Page 23

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed FIGURE 20 AIT PTIONS ©2003 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read word Read same No word No Does DQ 6 match? Yes Program/Erase Completed 23 Preliminary Specifications Data# Polling ...

Page 24

... Load data: 88H Address: AAAH Wait T IDA Read Sec ID X can but no other value C F NTRY OMMAND LOWCHARTS 24 SST39VF1681 / SST39VF1682 Command Sequence Load data: AAH Address: AAAH Load data: 55H Address: 555H Load data: 90H Address: 5555H Wait T IDA Read Software ID 1243 F20.0 ...

Page 25

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 FIGURE 22: S ID/CFI E OFTWARE ©2003 Silicon Storage Technology, Inc. Software ID Exit/CFI Exit/Sec ID Exit Command Sequence Load data: AAH Load data: F0H Address: AAAH Address: XXH Load data: 55H Wait T IDA Address: 555H Load data: F0H ...

Page 26

... Load data: 55H Address: 555H Load data: 50H Address Wait T SE Sector erased to FFFFH X can but no other value EQUENCE 26 SST39VF1681 / SST39VF1682 Block-Erase Command Sequence Load data: AAH Address: AAAH Load data: 55H Address: 555H Load data: 80H Address: AAAH Load data: AAH ...

Page 27

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 PRODUCT ORDERING INFORMATION SST 39 VF 1681 - XXXX - XXX Valid Combinations for SST39VF1681 SST39VF1681-70-4C-EK SST39VF1681-70-4C-B3K SST39VF1681-70-4C-EKE SST39VF1681-70-4C-B3KE SST39VF1681-70-4I-EK SST39VF1681-70-4I-B3K SST39VF1681-70-4I-EKE SST39VF1681-70-4I-B3KE SST39VF1681-90-4I-EK SST39VF1681-90-4I-EKE Valid Combinations for SST39VF1682 SST39VF1682-70-4C-EK SST39VF1682-70-4C-B3K SST39VF1682-70-4C-EKE SST39VF1682-70-4C-B3KE SST39VF1682-70-4I-EK SST39VF1682-70-4I-B3K SST39VF1682-70-4I-EKE SST39VF1682-70-4I-B3KE SST39VF1682-90-4I-EK SST39VF1682-90-4I-EKE Note: Valid combinations are those products in mass production or will be in mass production ...

Page 28

... MALL UTLINE SST ACKAGE ODE ©2003 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus 18.50 18.30 20.20 19.80 (TSOP ACKAGE SST39VF1681 / SST39VF1682 1.05 0.95 0.50 BSC 0.27 0.17 12.20 11.80 0.15 0.05 DETAIL 1.20 max. 0.70 0.50 1mm 48-tsop-EK-8 S71243-03-000 0˚- 5˚ ...

Page 29

... Mbit Multi-Purpose Flash Plus SST39VF1681 / SST39VF1682 TOP VIEW 8.00 ± 0. CORNER SIDE VIEW SEATING PLANE Note: 1. Complies with JEDEC Publication 95, MO-210, variant 'AB-1', although some dimensions may be more stringent. 2. All linear dimensions are in millimeters. 3. Coplanarity: 0. Ball opening size is 0.38 mm (± 0.05 mm) ...

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