DSPIC30F2023-20E/PT Microchip Technology, DSPIC30F2023-20E/PT Datasheet - Page 117

• Manufacturer Part Number: DSPIC30F2023-20E/PT
• Description: 12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 TQFP 10x10x1
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2023-20E/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 35
• Interface Type: I2C/SPI/UART
• On-chip Adc: 12-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 12-9:
REGISTER 12-10: TRGCONx: PWM TRIGGER CONTROL REGISTER
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-2
bit 1-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-6
bit 5-0
R/W-0
R/W-0
U-0
U-0
—
—
TRGDIV<2:0>
Unimplemented: Read as ‘0’
ALTDTRx<13:2>: Unsigned 12-bit Dead-Time Value bits for PWMx Dead-Time Unit
Unimplemented: Read as ‘0’
TRGDIV<2:0>: Trigger Output Divider bits
000 = Trigger output for every trigger event
001 = Trigger output for every 2nd trigger event
010 = Trigger output for every 3rd trigger event
011 = Trigger output for every 4th trigger event
100 = Trigger output for every 5th trigger event
101 = Trigger output for every 6th trigger event
110 = Trigger output for every 7th trigger event
111 = Trigger output for every 8th trigger event
Unimplemented: Read as ‘0’
TRGSTRT<5:0>: Trigger Postscaler Start Enable Select bits
This value specifies the ROLL counter value needed for a match that will then enable the trigger
postscaler logic to begin counting trigger events.
R/W-0
R/W-0
U-0
U-0
bits
—
—
ALTDTRx: PWM ALTERNATE DEAD-TIME REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
ALTDTR <7:2>
R/W-0
R/W-0
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
U-0
—
dsPIC30F1010/202X
ALTDTRx<13:8>
TRGSTRT<5:0>
R/W-0
R/W-0
R/W-0
U-0
—
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
U-0
U-0
—
—
DS70178C-page 115
R/W-0
R/W-0
U-0
U-0
—
—
bit 8
bit 0
bit 8
bit 0