PIC18F2423-I/ML Microchip Technology, PIC18F2423-I/ML Datasheet - Page 27

• Manufacturer Part Number: PIC18F2423-I/ML
• Description: 16KB, Flash, 768bytes-RAM, 25I/O, 8-bit Family,nanoWatt 28 QFN 6x6mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2423-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 5-3:
© 2005 Microchip Technology Inc.
WRT2
WRT1
WRT0
WRTD
WRTB
WRTC
EBTR3
EBTR2
EBTR1
EBTR0
EBTRB
DEV11:DEV4
DEV3:DEV0
REV3:REV0
Bit Name
PIC18F2423/2523/4423/4523 BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG6H
CONFIG6H
CONFIG6H
CONFIG7H
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
Write Protection bits (Block 2 code memory area)
1 = Block 2 is not write-protected
0 = Block 2 is write-protected
Write Protection bits (Block 1 code memory area)
1 = Block 1 is not write-protected
0 = Block 1 is write-protected
Write Protection bits (Block 0 code memory area)
1 = Block 0 is not write-protected
0 = Block 0 is write-protected
Write Protection bit (Data EEPROM)
1 = Data EEPROM is not write-protected
0 = Data EEPROM is write-protected
Write Protection bit (Boot Block memory area)
1 = Boot Block is not write-protected
0 = Boot Block is write-protected
Write Protection bit (Configuration registers)
1 = Configuration registers are not write-protected
0 = Configuration registers are write-protected
Table Read Protection bit (Block 3 code memory area)
1 = Block 3 is not protected from table reads executed in other blocks
0 = Block 3 is protected from table reads executed in other blocks
Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from table reads executed in other blocks
0 = Block 2 is protected from table reads executed in other blocks
Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from table reads executed in other blocks
0 = Boot Block is protected from table reads executed in other blocks
Device ID bits
These bits are used with the DEV3:DEV0 bits in the DEVID1 register to
identify part number.
Device ID bits
These bits are used with the DEV11:DEV4 bits in the DEVID2 register to
identify part number.
Revision ID bits
These bits are used to indicate the revision of the device.
PIC18F2423/2523/4423/4523
Description
DS39759A-page 27