S29AL016D70TFI010 Spansion Inc., S29AL016D70TFI010 Datasheet - Page 34

Flash Memory IC

S29AL016D70TFI010

Manufacturer Part Number
S29AL016D70TFI010
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29AL016D70TFI010

Memory Size
16Mbit
Memory Configuration
2M X 8 / 1M X 16
Ic Interface Type
Parallel
Access Time
70ns
Memory Case Style
TSOP
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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DQ5: Exceeded Timing Limits
DQ3: Sector Erase Timer
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
34
Standard
Mode
Erase
Suspend
Mode
limits. See
details.
Embedded Program Algorithm
Embedded Erase Algorithm
Reading within Erase
Suspended Sector
Reading within Non-Erase
Suspended Sector
Erase-Suspend-Program
DQ5: Exceeded Timing Limits
Operation
DQ5 indicates whether the program or erase time has exceeded a specified inter-
nal pulse count limit. Under these conditions DQ5 produces a “1.” This is a failure
condition that indicates the program or erase cycle was not successfully
completed.
The DQ5 failure condition may appear if the system tries to program a “1” to a
location that is previously programmed to “0.” Only an erase operation can
change a “0” back to a “1.” Under this condition, the device halts the opera-
tion, and when the operation has exceeded the timing limits, DQ5 produces a “1.”
Under both these conditions, the system must issue the reset command to return
the device to reading array data.
After writing a sector erase command sequence, the system may read DQ3 to de-
termine whether or not an erase operation has begun. (The sector erase timer
does not apply to the chip erase command.) If additional sectors are selected for
erasure, the entire time-out also applies after each additional sector erase com-
mand. When the time-out is complete, DQ3 switches from “0” to “1.” The system
may ignore DQ3 if the system can guarantee that the time between additional
sector erase commands will always be less than 50 µs. See also the
Command Sequence
After the sector erase command sequence is written, the system should read the
status on DQ7 (Data# Polling) or DQ6 (Toggle Bit I) to ensure the device has ac-
cepted the command sequence, and then read DQ3. If DQ3 is “1”, the internally
controlled erase cycle has begun; all further commands (other than Erase Sus-
pend) are ignored until the erase operation is complete. If DQ3 is “0”, the device
will accept additional sector erase commands. To ensure the command has been
accepted, the system software should check the status of DQ3 prior to and fol-
lowing each subsequent sector erase command. If DQ3 is high on the second
status check, the last command might not have been accepted.
the outputs for DQ3.
section.
Table 10. Write Operation Status
(Note
for more information.
DQ7#
DQ7#
DQ7
Data
0
1
2)
S29AL016D
P r e l i m i n a r y
No toggle
Toggle
Toggle
Toggle
DQ6
Data
(Note
DQ5
Data
0
0
0
0
1)
DQ3
Data
Table 10
N/A
N/A
N/A
1
Sector Erase
S29AL016D_00_A2 December 17, 2004
shows
(Note
No toggle
Toggle
Toggle
DQ2
Data
N/A
2)
RY/BY#
0
0
1
1
0

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