S29AL016D90TFI020 Spansion Inc., S29AL016D90TFI020 Datasheet - Page 11

• Manufacturer Part Number: S29AL016D90TFI020
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of S29AL016D90TFI020

• Memory Size: 16Mbit
• Ic Interface Type: Parallel
• Access Time: 90ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Peak Reflow Compatible (260 C): Yes
• Termination Type: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Requirements for Reading Array Data
Writing Commands/Command Sequences
Program and Erase Operation Status
December 17, 2004 S29AL016D_00_A2
To read array data from the outputs, the system must drive the CE# and OE# pins
to V
and gates array data to the output pins. WE# should remain at V
pin determines whether the device outputs array data in words or bytes.
The internal state machine is set for reading array data upon device power-up,
or after a hardware reset. This ensures that no spurious alteration of the mem-
ory content occurs during the power transition. No command is necessary in
this mode to obtain array data. Standard microprocessor read cycles that as-
sert valid addresses on the device address inputs produce valid data on the
device data outputs. The device remains enabled for read access until the com-
mand register contents are altered.
See
table for timing specifications and to
DC Characteristics table represents the active current specification for reading ar-
ray data.
To write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE# to V
For program operations, the BYTE# pin determines whether the device accepts
program data in bytes or words. See
information.
The device features an Unlock Bypass mode to facilitate faster programming.
Once the device enters the Unlock Bypass mode, only two write cycles are re-
quired to program a word or byte, instead of four.
Sequence
Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Tables 2
address” consists of the address bits required to uniquely select a sector. The
Command Definitions
or suspending/resuming the erase operation.
After the system writes the autoselect command sequence, the device enters the
autoselect mode. The system can then read autoselect codes from the internal
register (which is separate from the memory array) on DQ7–DQ0. Standard read
cycle timings apply in this mode. Refer to the
Command Sequence
I
the write mode. The
bles and timing diagrams for write operations.
During an erase or program operation, the system may check the status of the
operation by reading the status bits on DQ7–DQ0. Standard read cycle timings
and I
mation, and to
CC2
IL
Reading Array Data
in the DC Characteristics table represents the active current specification for
CC
. CE# is the power control and selects the device. OE# is the output control
read specifications apply. Refer to
IL
and
has details on programming data to the device using both standard and
, and OE# to V
3
AC Characteristics
indicate the address space that each sector occupies. A “sector
P r e l i m i n a r y
sections for more information.
AC Characteristics
section has details on erasing a sector or the entire chip,
for more information. Refer to the AC
IH
.
for timing diagrams.
S29AL016D
Figure 13
section contains timing specification ta-
Write Operation Status
Word/Byte Configuration
for the timing diagram. I
Autoselect Mode
Word/Byte Program Command
Read Operations
and
for more infor-
IH
. The BYTE#
Autoselect
for more
CC1
in the
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