C500MP102EV3 Omron, C500MP102EV3 Datasheet - Page 47

• Manufacturer Part Number: C500MP102EV3
• Description: K-TYPE PC MEMORY RACK
• Manufacturer: Omron

Specifications of C500MP102EV3

• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The Ladder Diagram
Combining AND LD and
OR LD
Complicated Diagrams
0000
0000
Block
Block
a
a
0001
0001
0002
0002
0004
Block
Block
Block
Block
0201
0004
b1
b2
b
b
0003
0003
0202
Both of the coding methods described above can also be used when using
both AND LD and OR LD, as long as the number of blocks being combined
does not exceed eight.
The following diagram contains only two logic blocks as shown. It is not nec-
essary to break block b down further, because it can coded directly using
only AND and OR.
Although the following diagram is similar to the one above, block b in the dia-
gram below cannot be coded without being broken down into two blocks
combined with OR LD. In this example, the three blocks have been coded
first and then OR LD has been used to combine the last two blocks followed
by AND LD to combine the execution condition produced by the OR LD with
the execution condition of block a.
When coding the logic block instructions together at the end of the logic
blocks they are combining, they must, as shown below, be coded in reverse
order, i.e., the logic block instruction for the last two blocks is coded first, fol-
lowed by the one to combine the execution condition resulting from the first
logic block instruction and the execution condition of the logic block third from
the end, and on back to the first logic block that is being combined.
When determining what logic block instructions will be required to code a dia-
gram, it is sometimes necessary to break the diagram into large blocks and
then continue breaking the large blocks down until logic blocks that can be
coded without logic block instructions have been formed. These blocks are
then coded, combining the small blocks first, and then combining the larger
blocks. AND LD and OR LD is used to combine either, i.e., AND LD or OR
LD always combines the last two execution conditions that existed, regard-
less of whether the execution conditions resulted from a single condition,
from logic blocks, or from previous logic block instructions.
When working with complicated diagrams, blocks will ultimately be coded
starting at the top left and moving down before moving across. This will gen-
erally mean that, when there might be a choice, OR LD will be coded before
AND LD.
0101
0102
0000
0001
0002
0003
0004
0005
0006
0007
Address Instruction
Address
0000
0001
0002
0003
0004
0005
0006
0007
0008
Instruction
LD NOT
AND
LD
AND NOT
LD NOT
AND
OR LD
AND LD
OUT
LD
AND NOT
LD
AND
OR
OR
AND LD
OUT
Operands
Operands
Section 4-3
0001
0000
0001
0002
0003
0004
0202
0102
0000
0002
0003
0201
0004
0101
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