HW-V5-ML505-UNI-G Xilinx Inc, HW-V5-ML505-UNI-G Datasheet - Page 27

• Manufacturer Part Number: HW-V5-ML505-UNI-G
• Description: KIT, EVAL PLATFORM, VIRTEX-5 LXT, ML505
• Manufacturer: Xilinx Inc

Specifications of HW-V5-ML505-UNI-G

• Kit Contents: RoHS Compliant
• Svhc: No SVHC (15-Dec-2010)
• Development Tool Type: Hardware / Software - Evaluation Kit
• Silicon Manufacturer: Xilinx
• Core Architecture: Virtex
• Silicon Family Name: Virtex-5
• Features: Linear Flash,
• Rohs Compliant: Yes

ML505/ML506/ML507 Getting Started Tutorial
UG348 (v3.0.3) June 18, 2009
R
7.
8.
9.
impact -batch etc/download.cmd
Program the linear flash at a specific configuration location
GUI menu, select Device Configuration → Program Flash Memory
Enter the path of the flash image:
<
Set the Flash Memory Properties, Instance Name to SRAM_c_mem1_baseaddr
Set the Flash Memory Properties, Program at Offset as follows:
Set the Scratch Memory Properties, Instance Name to
DDR2_SDRAM_c_mpmc_baseaddr
Select and set the CONFIG DIP switch values to indicate the desired linear flash
configuration location:
Press the PROG pushbutton to configure the Virtex-5 FPGA from the linear flash
using the configuration selected in
LAB_DIR
Click OK. Repeat this step for each BIN file to be programmed into the linear flash.
For Configuration 0, set the address to 0x00000000
For Configuration 1, set the address to 0x00800000
For Configuration 2, set the address to 0x01000000
For Configuration 3, set the address to 0x01800000
Configuration 0: 00001001
Configuration 1: 00101001
Configuration 2: 01001001
Configuration 3: 01101001
>/flash_hello0.bin
www.xilinx.com
Figure 12: Programming the Flash
step
8.
ML50x Demonstrations in Linear Flash
UG348_10_120108
(Figure
12). From the EDK
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