EFM32-TG-STK3300 Energy Micro, EFM32-TG-STK3300 Datasheet - Page 115

• Manufacturer Part Number: EFM32-TG-STK3300
• Description: MCU, MPU & DSP Development Tools TG Starter Kit
• Manufacturer: Energy Micro
• Series: EFM®32r
• Type: MCUr

Specifications of EFM32-TG-STK3300

• Processor To Be Evaluated: EFM32
• Processor Series: EMF32 Tiny Gecko
• Data Bus Width: 32 bit
• Interface Type: USB, JTAG, LCD, Touch Interface
• Operating Supply Voltage: 5 V
• Contents: Board, Cable, CD and Documentation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: EFM32-TGXXX

4.5.2 MPU Control Register
2011-02-04 - d0002_Rev1.00
Table 4.39. TYPE register bit assignments
The MPU CTRL register:
• enables the MPU
• enables the default memory map background region
• enables use of the MPU when in the hard fault, Non-maskable Interrupt (NMI), and FAULTMASK
See the register summary in Table 4.38 (p. 114) for the MPU CTRL attributes. The bit assignments are:
Table 4.40. MPU CTRL register bit assignments
31
31
Bits
[31:24]
[23:16]
[15:8]
[7:0]
[0]
Bits
[31:3]
[2]
[1]
escalated handlers.
Name
-
PRIVDEFENA
HFNMIENA
Reserved
Name
-
IREGION
DREGION
-
SEPARATE
Function
Reserved.
Indicates the number of supported MPU instruction regions.
Always contains 0x00. The MPU memory map is unified and is described by the DREGION field.
Indicates the number of supported MPU data regions:
0x08 = Eight MPU regions.
Reserved.
Indicates support for unified or separate instruction and date memory maps:
0 = unified.
Function
Reserved.
Enables privileged software access to the default memory map:
0 = If the MPU is enabled, disables use of the default memory map. Any memory access to a
location not covered by any enabled region causes a fault.
1 = If the MPU is enabled, enables use of the default memory map as a background region for
privileged software accesses.
When enabled, the background region acts as if it is region number -1. Any region that is
defined and enabled has priority over this default map.
If the MPU is disabled, the processor ignores this bit.
Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers.
When the MPU is enabled:
24 23
IREGION
Reserved
16 15
...the world's most energy friendly microcontrollers
115
DREGION
8 7
PRIVDEFENA
HFNMIENA
www.energymicro.com
ENABLE
Reserved
SEPARATE
3
2
1 0
1 0