ST7263-EMU2 STMicroelectronics, ST7263-EMU2 Datasheet - Page 101

• Manufacturer Part Number: ST7263-EMU2
• Description: MCU, MPU & DSP Development Tools ST7 Emulator Board
• Manufacturer: STMicroelectronics

Specifications of ST7263-EMU2

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
7.8.2 I
1) The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the undefined
2) The maximum hold time of the START condition has only to be met if the interface does not stretch the low period of
Cb = total capacitance of one bus line in pF
I
2
Bus free time between a STOP and START con-
dition
Hold time START condition. After this period,
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data set-up time
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Capacitive load for each bus line
the first clock pulse is generated
C/DDC-Bus Timings
region of the falling edge of SCL
SCL signal
2
C - Inter IC Control Interface
Parameter
4.7
4.0
250
4.0
4.7
4.0
4.7
0 (1)
Standard I
Min
1000
300
400
Max
2
C
1.3
0.6
1.3
0.6
0.6
0 (1)
100
20+0.1Cb
20+0.1Cb
0.6
Min
Fast I
2
C
0.9(2)
300
300
400
Max
T
T
T
T
T
T
T
T
TF
T
Cb
Symbol
BUF
HD:STA
LOW
HIGH
SU:STA
HD:DAT
SU:DAT
R
SU
:
STO
ST7263
101/109
ms
ns
ns
ns
ns
ns
pF
Unit
s
s
s
s