5M240ZM100C4N Altera, 5M240ZM100C4N Datasheet - Page 134

• Manufacturer Part Number: 5M240ZM100C4N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX® Vr

Specifications of 5M240ZM100C4N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 240
• Number Of Macrocells: 192
• Number Of Gates: -
• Number Of I /o: 79
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TFBGA
• Lead Free Status / Rohs Status: Vendor undefined / RoHS Compliant

7–32
MAX V Device Handbook
WRDI (Write Disable)
After the UFM is programmed, WRDI can be issued to set WEN back to 0, disabling WRITE
and preventing inadvertent writing to the UFM. WRDI is issued through the following
sequence, as shown in
1. nCS is pulled low.
2. Opcode 00000100 is transmitted to set WEN to 0 in the status register.
3. After the transmission of the eighth bit of WRDI, the interface is in wait state
4. nCS is pulled back to high.
Figure 7–29. WRDI Operation Sequence
(waiting for nCS to be pulled back to high). Any transmission after this is ignored.
Figure
SCK
nCS
SI
SO
7–29:
MSB
0
1
High Impedance
Instruction
2
8-bit
04
3
H
4
5 6 7
Chapter 7: User Flash Memory in MAX V Devices
January 2011 Altera Corporation
Software Support for UFM Block