AD9863BCPZ-50 Analog Devices Inc, AD9863BCPZ-50 Datasheet - Page 17

IC,RF Modulator/Demodulator,LLCC,64PIN,PLASTIC

AD9863BCPZ-50

Manufacturer Part Number
AD9863BCPZ-50
Description
IC,RF Modulator/Demodulator,LLCC,64PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9863BCPZ-50

Rf Type
WLL, WLAN
Features
12-bit ADC(s), 12-bit DAC(s)
Package / Case
64-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9863BCPZ-50
Manufacturer:
ADI/亚德诺
Quantity:
20 000
TERMINOLOGY
Input Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point of the rising edge of the
CLKIN1 signal and the instant at which the analog input is
actually sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Crosstalk
Coupling onto one channel being driven by a −0.5 dBFS
signal when the adjacent interfering channel is driven by a
full-scale signal.
Differential Analog Input Voltage Range
The peak-to-peak differential voltage that must be applied to
the converter to generate a full-scale response. Peak differen-
tial voltage is computed by observing the voltage on a single
pin and subtracting the voltage from the other pin, which is
180° out of phase. Peak-to-peak differential is computed by
rotating the input phase 180° and taking the peak measure-
ment again. Then the difference is computed between both
peak measurements.
Differential Nonlinearity
The deviation of any code width from an ideal 1 LSB step.
Effective Number of Bits (ENOB)
The effective number of bits is calculated from the measured
SNR based on the following equation:
Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that a signal
should be left in the logic high state to achieve rated perform-
ance; pulse width low is the minimum time a signal should be
left in the low state, logic low.
Full-Scale Input Power
Expressed in dBm, full-scale input power is computed using the
following equation:
Gain Error
Gain error is the difference between the measured and ideal
full-scale input voltage range of the ADC.
ENOB
Power
=
FULLSCALE
SNR
MEASURED
=
. 6
10
02
log
. 1
76
V
FULLSCALE
2
dB
. 0
001
RMS
Z
INPUT
Rev. A | Page 17 of 40
Harmonic Distortion, Second
The ratio of the rms signal amplitude to the rms value of the
second harmonic component, reported in dBc.
Harmonic Distortion, Third
The ratio of the rms signal amplitude to the rms value of the
third harmonic component, reported in dBc.
Integral Nonlinearity
The deviation of the transfer function from a reference line
measured in fractions of an LSB using a “best straight line”
determined by a least square curve fit.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog
signal frequency drops by no more than 3 dB below the
guaranteed limit.
Maximum Conversion Rate
The encode rate at which parametric testing is performed.
Output Propagation Delay
The delay between a differential crossing of CLK+ and
CLK− and the time when all output data bits are within
valid logic levels.
Power Supply Rejection Ratio
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise and Distortion (SINAD)
The ratio of the rms signal amplitude (set 1 dB below full scale)
to the rms value of the sum of all other spectral components,
including harmonics, but excluding dc.
Signal-to-Noise Ratio (without Harmonics)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral
components, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range (SFDR)
The ratio of the rms signal amplitude to the rms value of
the peak spurious spectral component. The peak spurious
component may or may not be a harmonic. It also may be
reported in dBc (for example, degrades as signal level is
lowered) or dBFS (for example, always related back to
converter full scale). SFDR does not include harmonic
distortion components.
Worst Other Spur
The ratio of the rms signal amplitude to the rms value of the
worst spurious component (excluding the second and third
harmonics) reported in dBc.
AD9863

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