ADM693AARWZ Analog Devices Inc, ADM693AARWZ Datasheet - Page 4

• Manufacturer Part Number: ADM693AARWZ
• Description: IC,Power Supply Supervisor,CMOS,SOP,16PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Battery Backup Circuitr

Specifications of ADM693AARWZ

• Number Of Voltages Monitored: 1
• Output: Open Drain, Push-Pull
• Reset: Active High/Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 4.4V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADM691A/ADM693A/ADM800L/M
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
V
V
V
GND
BATT ON
LOW LINE
OSC IN
OSC SEL
PFI
PFO
WDI
CE
CE
WDO
RESET
RESET
BATT
OUT
CC
OUT
IN
Function
Backup Battery Input. Connect to external battery or capacitor. Connect to ground if a backup battery is
not used.
Output Voltage, V
tial. When V
When V
V
Power Supply Input; +5 V.
0 V. Ground reference for all signals.
Logic Output. BATT ON goes high when V
V
ternal PNP transistor to increase the output current above the 250 mA rating of V
Logic Output. LOW LINE goes low when V
V
Oscillator Logic Input. With OSC SEL high or floating, the internal oscillator is enabled and sets the reset
delay and the watchdog timeout period. Connecting OSC IN low selects 100 ms while leaving it floating
selects 1.6 sec. With OSC SEL low, OSC IN can be driven by an external clock signal or an external ca-
pacitor can be connected between OSC IN and GND. This sets both the reset active pulse timing and the
watchdog timeout period. (See Table II and Figure 4.)
Logic Oscillator Select Input. When OSC SEL is unconnected (floating) or driven high, the internal oscil-
lator sets the reset active time and watchdog timeout period. When OSC SEL is low, the external oscillator
input, OSC IN, is enabled. OSC SEL has a 10 A internal pullup.
Power Fail Input. PFI is the noninverting input to the Power Fail Comparator. When PFI is less than
1.25 V, PFO goes low. Connect PFI to GND or V
Power Fail Output. PFO is the output of the Power Fail Comparator. It goes low when PFI is less than
1.25 V.
Watchdog Input. WDI is a three level input. If WDI remains either high or low for longer than the watch-
dog timeout period, RESET pulses low and WDO goes low. The timer resets with each transition on the
WDI line. The Watchdog Timer may be disabled if WDI is left floating or is driven to midsupply.
Output. CE
reset is asserted, CE
Chip Enable Input. The input to the CE gating circuit. Connect to GND or V
Logic Output. The Watchdog Output, WDO, goes low if WDI remains either high or low for longer than
the Watchdog timeout period. WDO is set high by the next transition at WDI. WDO remains high if WDI
is unconnected.
Logic Output. RESET goes low if V
V
Logic Output. RESET is an open-drain output. It is the inverse of RESET.
CC
OUT
CC
CC
if a backup battery is not being used.
goes above the reset threshold.
rises above the reset threshold.
is internally switched to V
CC
is lower than V
OUT
CC
is higher than V
goes low only when CE
CC
OUT
or V
will remain low for 15 s or until CE
BATT
BATT
LOW LINE
BATT ON
PIN CONFIGURATIONS
OSC SEL
OSC IN
PIN DESCRIPTIONS
V
V
BATT
GND
is internally switched to V
OUT
V
BATT
and below the reset threshold, V
CC
CC
. The output may also be used to drive the base (via a resistor) of an ex-
1
2
3
4
5
6
7
8
CC
and is also higher than the reset threshold, V
(Not to Scale)
ADM691A
ADM693A
ADM800L
ADM800M
–4–
TOP VIEW
falls below the Reset Threshold. It remains low for 200 ms typ after
IN
is low and V
OUT
CC
16
15
14
13
12
11
10
falls below the reset threshold. It returns high as soon as
9
is internally switched to the V
OUT
RESET
RESET
WDO
CE
CE
WDI
PFO
PFI
IN
OUT
CC
when not used.
OUT
is above the reset threshold. If CE
depending on which is at the highest poten-
IN
BATT
goes high, whichever occurs first.
is switched to V
BATT
OUT
CC
OUT
if not used.
input. It goes low when
is switched to V
OUT
.
. Connect V
IN
is low when
REV. 0
OUT
OUT
.
to