ADM693AARWZ Analog Devices Inc, ADM693AARWZ Datasheet - Page 8

• Manufacturer Part Number: ADM693AARWZ
• Description: IC,Power Supply Supervisor,CMOS,SOP,16PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Battery Backup Circuitr

Specifications of ADM693AARWZ

• Number Of Voltages Monitored: 1
• Output: Open Drain, Push-Pull
• Reset: Active High/Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 4.4V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADM691A/ADM693A/ADM800L/M
Changing the Watchdog and Reset Timeout
The watchdog and reset timeout periods may be controlled us-
ing OSC SEL and OSC IN. Please refer to Table II. With both
these inputs floating (or connected to V
reset timeout is fixed at 200 ms and the watchdog timeout is
fixed at 1.6 sec.. If OSC IN is connected to GND as in Figure
16, the reset timeout period remains at 200 ms but a short
(100 ms) watchdog timeout period is selected (except immedi-
ately following a reset where it reverts to 1.6 sec). By connecting
OSC SEL to GND it is possible to select alternative timeout pe-
riods by either connecting a capacitor from OSC IN to GND or
by overdriving OSC IN with an external clock. With an external
capacitor, the watchdog timeout period is
and the reset active period is
With an external clock connected to OSC IN, the timeout
periods become
Battery-Switchover Section
During normal operation with V
old and higher than V
via an internal PMOS transistor switch. This switch has a typi-
cal on-resistance of 0.75
V
bank which may require instantaneous currents of greater than
250 mA. If this is the case then a bypass capacitor should be
connected to V
transients to the RAM. A capacitance value of 0.1 F or greater
may be used.
If the continuous output current requirement at V
250 mA or if a lower V
an external PNP pass transistor may be connected in parallel
with the internal transistor. The BATT ON output can drive
the base of the external transistor.
If V
backup is selected. A 7
input to V
differential (dropout voltage) at the low current levels required for
battery backup of CMOS RAM or other low power CMOS cir-
cuitry. The supply current in battery backup is typically 0.04 A.
High value capacitors, either standard electrolytic or the farad-
size double layer capacitors, can also be used for short-term
memory backup.
If the battery-switchover section is not used, V
connected to GND and V
OSC SEL
Low
Low
Floating
Floating
OUT
CC
terminal. V
drops below V
OUT
. This MOSFET has very low input-to-output
OUT
OUT
Treset (ms) = 1200 (C/47 pF)
. The capacitor will provide the peak current
Twd (ms) = 600 (C/47 pF)
External Clock Input
External Capacitor
Low
Floating or V
BATT
OSC IN
Treset = 2048 (1/f
is normally used to drive a RAM memory
BATT
Twd = 1024 (1/f
CC
–V
MOSFET switch connects the V
OUT
, V
and below the reset threshold, battery
and can supply up to 250 mA at the
OUT
CC
should be connected to V
CC
is internally switched to V
voltage differential is desired,
OUT
Table II. Reset Pulse Width and Watchdog Timeout Selections
higher than the reset thresh-
CLK
CLK
OUT
)
)
) as in Figure 16, the
BATT
Normal
1024 clks
600 ms
100 ms
1.6 s
OUT
should be
exceeds
CC
Watchdog Timeout Period
.
OUT
BATT
C/47 pF
–8–
When V
disabled and WDI goes high impedance as it is disconnected
from its internal resistor network.
The internal oscillator is enabled when OSC SEL is high or
floating. In this mode, OSC IN selects between the 1.6 second
and 100 ms watchdog timeout periods.
RESET
RESET
CE
CE
V
OUT
CC
IN
Figure 18b. Internal Oscillator (1.6 s Watchdog)
THRESHOLD
4096 clks
Immediately After Reset
2.4 s
1.6 s
1.6 s
CC
Figure 17. RESET and Chip Enable Timing
RESET
is below the reset threshold, the watchdog function is
0 TO 250kHz
Figure 18a. External Clock Source
CLOCK
C/47 pF
Figure 18c. External Capacitor
80µs
C
OSC
NC
NC
8
7
8
7
8
7
12µs
OSC IN
OSC SEL
OSC SEL
OSC IN
OSC SEL
OSC IN
t
RS
ADM69_A
ADM800_
ADM69_A
ADM800_
ADM69_A
ADM800_
Reset Active Period
2048 clks
1200 ms
200 ms
200 ms
80µs
C/47 pF
t
RS
OSC SEL
REV. 0