AM29F160DT-90EI Spansion Inc., AM29F160DT-90EI Datasheet - Page 25

• Manufacturer Part Number: AM29F160DT-90EI
• Description: IC,EEPROM,NOR FLASH,1MX16/2MX8,CMOS,TSSOP,48PIN,PLASTIC
• Manufacturer: Spansion Inc.

Specifications of AM29F160DT-90EI

• Rohs Compliant: NO
• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

WRITE OPERATION STATUS
The device provides several bits to determine the sta-
tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7,
and RY/BY#.
subsections describe the functions of these bits. DQ7,
RY/BY#, and DQ6 each offer a method for determining
whether a program or erase operation is complete or in
progress. These three bits are discussed first.
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host
system whether an Embedded Algor ithm is in
progress or completed, or whether the device is in
Erase Suspend. Data# Polling is valid after the rising
edge of the final WE# pulse in the program or erase
command sequence.
During the Embedded Program algorithm, the device
outputs on DQ7 the complement of the datum pro-
grammed to DQ7. This DQ7 status also applies to pro-
g r a m m i n g d u r i n g E r a s e S u s p e n d . W h e n t h e
Embedded Program algorithm is complete, the device
outputs the datum programmed to DQ7. The system
must provide the program address to read valid status
information on DQ7. If a program address falls within a
protected sector, Data# Polling on DQ7 is active for ap-
proximately 2 µs, then the device returns to reading
array data.
During the Embedded Erase algorithm, Data# Polling
produces a “0” on DQ7. When the Embedded Erase al-
gorithm is complete, or if the device enters the Erase
Suspend mode, Data# Polling produces a “1” on DQ7.
This is analogous to the complement/true datum output
described for the Embedded Program algorithm: the
erase function changes all the bits in a sector to “1”;
prior to this, the device outputs the “complement,” or
“0.” The system must provide an address within any of
the sectors selected for erasure to read valid status in-
formation on DQ7.
After an erase command sequence is written, if all sec-
tors selected for erasing are protected, Data# Polling
on DQ7 is active for approximately 100 µs, then the de-
vice returns to reading array data. If not all selected
sectors are protected, the Embedded Erase algorithm
erases the unprotected sectors, and ignores the se-
lected sectors that are protected.
When the system detects DQ7 changes from the com-
plement to true data, it can read valid data at DQ7–
DQ0 on the following read cycles. This is because DQ7
may change asynchronously with DQ0–DQ6 while
Output Enable (OE#) is asserted low. The Data# Poll-
ing Timings (During Embedded Algorithms) figure in
the “AC Characteristics” section illustrates this.
April 23, 2010 Am29F160D_00_D10
Table 10 on page 26
and the following
D A T A S H E E T
Am29F160D
Table 10 on page 26
ing on DQ7.
rithm.
Notes:
1. VA = Valid address for programming. During a sector
2. DQ7 should be rechecked even if DQ5 = “1” because
No
erase operation, a valid address is an address within any
sector selected for erasure. During chip erase, a valid
address is any non-protected sector address.
DQ7 may change simultaneously with DQ5.
Figure 5. Data# Polling Algorithm
Read DQ7–DQ0
Read DQ7–DQ0
DQ7 = Data?
DQ7 = Data?
Figure 5
Addr = VA
Addr = VA
DQ5 = 1?
START
FAIL
No
Yes
No
shows the outputs for Data# Poll-
shows the Data# Polling algo-
Yes
Yes
PASS
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