DSPIC33EP256MU810-I/PF Microchip Technology, DSPIC33EP256MU810-I/PF Datasheet - Page 557

• Manufacturer Part Number: DSPIC33EP256MU810-I/PF
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PF

• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

Revision D (August 2011)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
The Data Converter Interface (DCI) module is available
on
PIC24EPXXXGU810/814
throughout
accordingly.
TABLE A-3:
 2009-2011 Microchip Technology Inc.
Section 1.0 “Device Overview”
Section 2.0 “Guidelines for Getting
Started with 16-bit Digital Signal
Controllers and Microcontrollers”
Section 3.0 “CPU”
Section 4.0 “Memory Organization” Updated FIGURE 4-3: “Data Memory Map for dsPIC33EP512MU810/814
Section 6.0 “Resets”
Section 8.0 “Direct Memory Access
(DMA)”
Section 9.0 “Oscillator
Configuration”
Section 23.0 “10-bit/12-bit Analog-
to-Digital Converter (ADC)”
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
all
Section Name
the
dsPIC33EPXXXMU806/810/814
MAJOR SECTION UPDATES
document
devices.
have
been
Added Section 1.1 “Referenced Sources”.
Updated the Note in Section 2.1 “Basic Connection Requirements”.
Updated Section 3.1 “Registers”.
Devices with 52 KB RAM” and FIGURE 4-5: “Data Memory Map for
dsPIC33EP256MU806/810/814 Devices with 28 KB RAM”.
Updated the IFS3, IEC3, IPC14, and IPC15 SFRs in the Interrupt Controller
Register Map (see Table 4-6).
Updated the SMPI bits for the AD1CON2 and AD2CON2 SFRs in the ADC1
and ADC2 Register Map (see Table 4-23).
Updated the All Resets values for the CLKDIV and PLLFBD SFRs and
removed the SBOREN bit in the System Control Register Map
(see Table 4-43).
Removed the SBOREN bit and Notes 3 and 4 from the Reset Control
Register (see Register 6-1).
Removed Note 2 from the DMA Channel x IRQ Select Register (see
Register 8-2).
Updated the PLL Block Diagram (see Figure 9-2).
Updated the value at PORT and the default designations for the
DOZE<2:0>, FRCDIV<2:0>, and PLLPOST<1:0> bits in the Clock Divisor
Register and the PLLDIV<8:0> bits in the PLLFBD register (see Register 9-2
and Register 9-3).
Added Note 4 and updated the ADC Buffer names in the ADCx Module
Block Diagram (see Figure 23-1).
Added Note 3 to the ADCx Control Register 1 (see Register 23-1).
Added the new ADC2 Control Register 2 (see Register 23-3).
Updated the SMPI<4:0> bit value definitions in the ADC1 Control Register 2
(see Register 23-2).
References
updated
and
Preliminary
The following pin name changes were implemented
throughout the document:
• C1INA renamed to C1IN1+
• C1INB renamed to C1IN2-
• C1INC renamed to C1IN1-
• C1IND renamed to C1IN3-
• C2INA renamed to C2IN1+
• C2INB renamed to C2IN2-
• C2INC renamed to C2IN1-
• C2IND renamed to C2IN3-
• C3INA renamed to C3IN1+
• C3INB renamed to C3IN2-
• C3INC renamed to C3IN1-
• C3IND renamed to C3IN3-
The other major changes are referenced by their
respective section in
Update Description
Table
A-3.
DS70616E-page 557