KSZ8842-32MQL Micrel Inc, KSZ8842-32MQL Datasheet - Page 131

2-Port Ethernet Switch/Repeater + Generic (32-bit) Bus Interface( )

KSZ8842-32MQL

Manufacturer Part Number
KSZ8842-32MQL
Description
2-Port Ethernet Switch/Repeater + Generic (32-bit) Bus Interface( )
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8842-32MQL

Controller Type
Ethernet Switch Controller
Interface
PCI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1634 - BOARD EVALUATION KSZ8842-16MQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-1479
576-1479-5
576-1479-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8842-32MQL
Manufacturer:
Micrel
Quantity:
167
Part Number:
KSZ8842-32MQL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8842-32MQLA6
Manufacturer:
Micrel Inc
Quantity:
10 000
Synchronous Read Timing (VLBUSN = 0)
Micrel, Inc.
October 2007
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
Address, AEN, BExN
Parameter
A1-A15, AEN, BExN[3:0] setup to ADSN rising
A1-A15, AEN, BExN[3:0] hold after ADSN rising
CYCLEN setup to BCLK rising
CYCLEN hold after BCLK rising (non-burst mode)
SWR setup to BCLK
Read data hold from BCLK rising
Read data setup to BCLK
SRDYN setup to BCLK
SRDYN hold to BCLK
RDYRTNN setup to BCLK rising
RDYRTNN hold after BCLK rising
Read Data
RDYRTNN
CYCLEN
SRDYN
Table 31. Synchronous Read (VLBUSN = 0) Timing Parameters
ADSN
BCLK
SWR
Figure 24. Synchronous Read Cycle – VLBUSN = 0
valid
t1
131
t2
t5
t3
t4
Min
4
2
4
2
4
1
8
8
1
4
1
t7
valid
t8
t10
KSZ8842-16/32 MQL/MVL/MVLI/MBL
Typ
t6
t9
t11
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
M9999-102207-1.9

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