KSZ8842-32MQL Micrel Inc, KSZ8842-32MQL Datasheet - Page 62

• Manufacturer Part Number: KSZ8842-32MQL
• Description: 2-Port Ethernet Switch/Repeater + Generic (32-bit) Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-32MQL

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1634 - BOARD EVALUATION KSZ8842-16MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1479; 576-1479-5; 576-1479-5

Bank 1: Reserved
Except Bank Select Register (0xE).
Bank 2 Host MAC Address Register Low (0x00): MARL
This register along with the other two Host MAC address registers are loaded starting at word location 0x1 of the
EEPROM upon hardware reset. The software driver can modify the register, but it will not modify the original Host MAC
address value in the EEPROM. These six bytes of Host MAC address in external EEPROM are loaded to these three
registers as mapping below:
MARL[15:0] = EEPROM 0x1(MAC Byte 2 and 1)
MARM[15:0] = EEPROM 0x2(MAC Byte 4 and 3)
MARH[15:0] = EEPROM 0x3(MAC Byte 6 and 5)
The Host MAC address is used to define the individual destination address that the KSZ8842M responds to when
receiving frames. Network addresses are generally expressed in the form of 01:23:45:67:89:AB, where the bytes are
received from left to right, and the bits within each byte are received from right to left (LSB to MSB). For example, the
actual transmitted and received bits are on the order of 10000000 11000100 10100010 11100110 10010001 11010101.
These three registers value for Host MAC address 01:23:45:67:89:AB will be held as below:
MARL[15:0] = 0x89AB
MARM[15:0] = 0x4567
MARH[15:0] = 0x0123
The following table shows the register bit fields.
Bank 2 Host MAC Address Register Middle (0x02): MARM
The middle word of Host MAC address.
The following table shows the register bit fields.
Bank 2 Host MAC Address Register High (0x04): MARH
The high word of Host MAC address.
The following table shows the register bit fields.
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
October 2007
-
Default Value
-
Default Value
-
Default Value
R/W
RW
R/W
RW
R/W
RW
Description
MARL MAC Address Low
The least significant word of the MAC address.
Description
MARM MAC Address Middle
The middle word of the MAC address.
Description
MARH MAC Address High
The Most significant word of the MAC address.
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KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9