LMX24856211EVAL National Semiconductor, LMX24856211EVAL Datasheet - Page 19

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LMX24856211EVAL

Manufacturer Part Number
LMX24856211EVAL
Description
DELTA-SIGMA LOW POWER DUAL PLL
Manufacturer
National Semiconductor
Datasheet

Specifications of LMX24856211EVAL

Lead Free Status / Rohs Status
Not Compliant
Input Impedance Measurement Procedure
The above block diagram shows the test setup used for mea-
suring the input impedance for the LMX2485. The DC block-
ing capacitor used between the input SMA connector and the
pin being measured must be changed to a zero Ohm resistor.
This procedure applies to the FinRF, FinIF, and OSCin pins.
The basic test procedure is to calibrate the network analyzer,
ensure that the part is powered up, and then measure the
input impedance. The network analyzer can be calibrated by
using either calibration standards or by soldering resistors di-
rectly to the evaluation board. An open can be implemented
by putting no resistor, a short can be implemented by solder-
ing a zero ohm resistor as close as possible to the pin being
measured, and a short can be implemented by soldering two
100 ohm resistors in parallel as close as possible to the pin
being measured. Calibration is done with the PLL removed
from the PCB. This requires the use of a clamp down fixture
that may not always be generally available. If no clamp down
fixture is available, then this procedure can be done by cali-
brating up to the point where the DC blocking capacitor usu-
19
ally is, and then implementing port extensions with the
network analyzer. Zero ohm resistor is added back for the
actual measurement. Once the setup is calibrated, it is nec-
essary to ensure that the PLL is powered up. This can be done
by toggling the power down bits (RF_PD and IF_PD) and ob-
serving that the current consumption indeed increases when
the bit is disabled. Sometimes it may be necessary to apply
a signal to the OSCin pin in order to program the part. If this
is necessary, disconnect the signal once it is established that
the part is powered up. It is useful to know the input
impedance of the PLL for the purposes of debugging RF
problems and designing matching networks. Another use of
knowing this parameter is make the trace width on the PCB
such that the input impedance of this trace matches the real
part of the input impedance of the PLL frequency of operation.
In general, it is good practice to keep trace lengths short and
make designs that are relatively resistant to variations in the
input impedance of the PLL.
20087771
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