MMDF2P02ER2G ON Semiconductor, MMDF2P02ER2G Datasheet - Page 4

• Manufacturer Part Number: MMDF2P02ER2G
• Description: MOSFET PWR P-CH 25V 2.5A 8-SOIC
• Manufacturer: ON Semiconductor

Specifications of MMDF2P02ER2G

• Fet Type: 2 P-Channel (Dual)
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 250 mOhm @ 2A, 10V
• Drain To Source Voltage (vdss): 25V
• Current - Continuous Drain (id) @ 25° C: 2.5A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 15nC @ 10V
• Input Capacitance (ciss) @ Vds: 475pF @ 16V
• Power - Max: 2W
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

by recognizing that the power MOSFET is charge
controlled. The lengths of various switching intervals (Dt)
are determined by how fast the FET input capacitance can
be charged by current from the generator.
The published capacitance data is difficult to use for
calculating rise and fall because drain−gate capacitance
varies greatly with applied voltage. Accordingly, gate
charge data is used. In most cases, a satisfactory estimate of
average input current (I
rudimentary analysis of the drive circuit so that
t = Q/I
During the rise and fall time interval when switching a
resistive load, V
known as the plateau voltage, V
times may be approximated by the following:
t
t
where
V
R
and Q
r
f
GG
G
= Q
= Q
Switching behavior is most easily modeled and predicted
1000
800
600
400
200
= the gate drive resistance
0
= the gate drive voltage, which varies from zero to V
10
2
2
2
G(AV)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
x R
x R
and V
V
C
C
DS
iss
rss
G
G
= 0 V
/(V
/V
5
GSP
V
GSP
GS
GG
Figure 7. Capacitance Variation
GS
are read from the gate charge curve.
0
− V
remains virtually constant at a level
V
GSP
DS
V
GS
5
)
G(AV)
= 0 V
SGP
10
) can be made from a
. Therefore, rise and fall
15
C
POWER MOSFET SWITCHING
C
C
oss
rss
iss
20
T
J
25
= 25°C
http://onsemi.com
MMDF2P02E
GG
30
4
12
During the turn−on and turn−off delay times, gate current is
not constant. The simplest calculation uses appropriate
values from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:
t
t
The capacitance (C
a voltage corresponding to the off−state condition when
calculating t
on−state when calculating t
complicate the analysis. The inductance of the MOSFET
source lead, inside the package and in the circuit wiring
which is common to both the drain and gate current paths,
produces a voltage at the source which reduces the gate drive
current. The voltage is determined by Ldi/dt, but since di/dt
is a function of drain current, the mathematical solution is
complex.
complicates the mathematics. And finally, MOSFETs have
finite internal gate resistance which effectively adds to the
resistance of the driving source, but the internal resistance
is difficult to measure and, consequently, is not specified.
9
6
3
0
d(on)
d(off)
0
At high switching speeds, parasitic circuit elements
Q1
Drain−to−Source Voltage versus Total Charge
= R
= R
Q3
G
G
2
V
DS
C
C
Figure 8. Gate−to−Source and
d(on)
The
iss
iss
Q2
In [V
Q
In (V
and is read at a voltage corresponding to the
g
, TOTAL GATE CHARGE (nC)
MOSFET
4
iss
GG
) is read from the capacitance curve at
GG
QT
/(V
/V
GSP
6
d(off)
GG
)
− V
output
.
GSP
V
8
GS
)]
I
T
D
capacitance
J
= 2 A
= 25°C
10
12
16
12
8
4
0
also