ETHER-FAST-XP-N3 Lattice, ETHER-FAST-XP-N3 Datasheet - Page 25

• Manufacturer Part Number: ETHER-FAST-XP-N3
• Description: Ethernet ICs Ethernet MAC 10/100 Mbps
• Manufacturer: Lattice

Specifications of ETHER-FAST-XP-N3

• Product: Ethernet Controllers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
10. MII Transmit and Receive Operations (10/100 Mode)
On the transmit side, txd and tx_en are driven synchronous to the gtx_clk. tx_er is asserted to indicate that
the frame being transmitted has an error.
On the receive interface, rxd and rx_en are sampled on the rising edge of rx_clk. An error in the frame is indi-
cated when rx_er is high when sampled on the rising clock edge.
col and crs are asynchronous signals, useful in the half-duplex mode only.
Figure 12. MII Transmit and Receive Operations
Custom Core Configurations
To request Tri-Speed MAC core configurations not available in the Evaluation Package, please contact your Lattice
sales office.
Reference Information
The following documents provide more information on implementing this core:
• ispLEVER
• ispLeverCORE™ IP Module Evaluation Tutorial available on the Lattice web site at www.latticesemi.com
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
e-mail:
Internet: www.latticesemi.com
[phone] (Outside North America)
[e-mail]
®
Software User Manual
rxd[0:3]
txd[0:3]
tx_clk
rx_clk
rx_en
rx_er
tx_en
tx_er
crs
col
VALID FRAME DATA
VALID FRAME DATA
FRAME WITHOUT
FRAME WITHOUT
COLLISION
ERROR
25
Media Access Controller User’s Guide
VALID FRAME DATA
VALID FRAME DATA
FRAME WITH
FRAME WITH
COLLISION
ERROR
10/100 and 1Gig Ethernet