DS33R11 Maxim Integrated Products, DS33R11 Datasheet - Page 262

• Manufacturer Part Number: DS33R11
• Description: Network Controller & Processor ICs Ethernet Mapper with Integrated T1-E1-J1
• Manufacturer: Maxim Integrated Products

Specifications of DS33R11

• Product: Framer
• Number Of Transceivers: 1
• Supply Voltage (max): 1.89 V, 3.465 V
• Supply Voltage (min): 1.71 V, 3.135 V
• Supply Current (max): 100 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: BGA

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Receive Channels 9 to 16 Code Insertion Control Bits (CH9 to CH16)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Receive Channels 17 to 24 Code Insertion Control Bits (CH17 to CH24)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Receive Channels 25 to 32 Code Insertion Control Bits (CH25 to CH32)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 – 7: Receive Channels 1 to 8 Channel Blocking Control Bits (CH1 to CH8)
0 = do not insert data from the idle-code array into the receive data stream
1 = insert data from the idle-code array into the receive data stream
0 = do not insert data from the idle-code array into the receive data stream
1 = insert data from the idle-code array into the receive data stream
0 = do not insert data from the idle-code array into the receive data stream
1 = insert data from the idle-code array into the receive data stream
0 = force the RCHBLK pin to remain low during this channel time
1 = force the RCHBLK pin high during this channel time
CH16
CH24
CH32
CH8
7
0
7
0
7
0
7
0
TR.RCICE2
Receive-Channel Idle-Code Enable Register 2
85h
TR.RCICE3
Receive-Channel Idle-Code Enable Register 3
86h
TR.RCICE4
Receive-Channel Idle-Code Enable Register 4
87h
TR.RCBR1
Receive Channel Blocking Register 1
88h
CH15
CH23
CH31
CH7
6
0
6
0
6
0
6
0
CH14
CH22
CH30
CH6
5
0
5
0
5
0
5
0
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CH13
CH21
CH29
CH5
0
0
0
0
4
4
4
4
CH20
CH28
CH12
CH4
3
0
3
0
3
0
3
0
CH11
CH19
CH27
CH3
2
0
2
0
2
0
2
0
CH10
CH18
CH26
CH2
1
0
1
0
1
0
1
0
CH17
CH25
CH9
CH1
0
0
0
0
0
0
0
0