DS33R11 Maxim Integrated Products, DS33R11 Datasheet - Page 33
DS33R11
Manufacturer Part Number
DS33R11
Description
Network Controller & Processor ICs Ethernet Mapper with Integrated T1-E1-J1
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33R11.pdf
(344 pages)
Specifications of DS33R11
Product
Framer
Number Of Transceivers
1
Supply Voltage (max)
1.89 V, 3.465 V
Supply Voltage (min)
1.71 V, 3.135 V
Supply Current (max)
100 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
BGA
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RSYSCLK
RMSYNC
RFSYNC
RSYNC
NAME
RSIG
PIN
G4
A3
U3
F4
L3
TYPE
I/O
O
O
O
I
Receive Sync for the T1/E1/J1 Transceiver: An extracted pulse,
one RCLKO wide, is output at this pin, which identifies either frame
(TR.IOCR1.5 = 0) or multiframe (TR.IOCR1.5 = 1) boundaries. If
set to output-frame boundaries then via TR.IOCR1.6, RSYNC can
also be set to output double-wide pulses on signaling frames in T1
mode. If the receive-side elastic store is enabled, then this pin can
be enabled to be an input via TR.IOCR1.4 at which a frame or
multiframe boundary pulse is applied.
Receive System Clock for the Transceiver: 1.544MHz,
2.048MHz, 4.096MHz, or 8.192MHz clock. Only used when the
receive-side elastic-store function is enabled. Should be tied low in
applications that do not use the receive-side elastic store.
Receive Frame Sync (Pre Receive Elastic Store) for T1/E1/J1
Transceiver: An extracted 8kHz pulse, one RCLKO wide, is output
at this pin, which identifies frame boundaries.
Receive Multiframe Sync for the T1/E1/J1 Transceiver: An
extracted pulse, one RCLKO wide (elastic store disabled) or one
RSYSCLK wide (elastic store enabled), is output at this pin, which
identifies multiframe boundaries.
Receive Signaling Output: Outputs signaling bits in a PCM
format. Updated on rising edges of RCLKO when the receive-side
elastic store is disabled. Updated on the rising edges of RSYSCLK
when the receive-side elastic store is enabled.
33 of 344
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