74HC4051D NXP Semiconductors, 74HC4051D Datasheet
74HC4051D
Specifications of 74HC4051D
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74HC4051D Summary of contents
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Rev. 4 — 17 January 2011 1. General description The 74HC4051; 74HCT4051 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC ...
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... Type number Package Temperature range Name 40 C to +125 C 74HC4051N 74HCT4051N 40 C to +125 C 74HC4051D 74HCT4051D 40 C to +125 C 74HC4051DB 74HCT4051DB 40 C to +125 C 74HC4051PW 74HCT4051PW 40 C to +125 C 74HC4051BQ 74HCT4051BQ 5. Functional diagram Fig 1. Functional diagram ...
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... NXP Semiconductors Fig 2. Logic symbol from logic Fig 4. Schematic diagram (one switch) 74HC_HCT4051 Product data sheet 001aad541 Fig 3. All information provided in this document is subject to legal disclaimers. Rev. 4 — 17 January 2011 74HC4051; 74HCT4051 8-channel analog multiplexer/demultiplexer MUX/DMUX 001aad542 IEC logic symbol 001aad544 ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning 74HC4051 74HCT4051 GND Fig 5. Pin configuration DIP16, SO16, and (T)SSOP16 6.2 Pin description Table 2. Pin description Symbol Pin GND 8 S0, S1, S2 11, 10, 9 Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12 independent input or output 74HC_HCT4051 Product data sheet ...
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... NXP Semiconductors 7. Functional description 7.1 Function table [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol Parameter V supply voltage ...
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... NXP Semiconductors 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V switch voltage SW T ambient temperature amb t/V input transition rise and fall rate 10 V GND CC ( operating area Fig 7. Guaranteed operating area as a function of the ...
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... NXP Semiconductors 10. Static characteristics Table 6. R resistance per switch for 74HC4051 and 74HCT4051 for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os For 74HC4051: V GND For 74HCT4051: V GND = 4.5 V and 5 ...
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... NXP Semiconductors Table 6. R resistance per switch for 74HC4051 and 74HCT4051 for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os For 74HC4051: V GND For 74HCT4051: V GND = 4.5 V and 5 ...
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... NXP Semiconductors V sw from select Sn input Yn GND V is -------- - Fig 9. Test circuit for measuring R Table 7. Static characteristics for 74HC4051 Voltages are referenced to GND (ground = 0 V the input voltage at pins whichever is assigned as an input the output voltage at pins Z or Yn, whichever is assigned as an output. ...
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... NXP Semiconductors Table 7. Static characteristics for 74HC4051 Voltages are referenced to GND (ground = 0 V the input voltage at pins whichever is assigned as an input the output voltage at pins Z or Yn, whichever is assigned as an output. os Symbol Parameter I supply current CC C input capacitance I C switch capacitance sw = 40 C to +85 C ...
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... NXP Semiconductors Table 7. Static characteristics for 74HC4051 Voltages are referenced to GND (ground = 0 V the input voltage at pins whichever is assigned as an input the output voltage at pins Z or Yn, whichever is assigned as an output. os Symbol Parameter I input leakage current I I OFF-state leakage S(OFF) current I ON-state leakage ...
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... NXP Semiconductors Table 8. Static characteristics for 74HCT4051 Voltages are referenced to GND (ground = 0 V the input voltage at pins whichever is assigned as an input the output voltage at pins Z or Yn, whichever is assigned as an output. os Symbol Parameter = 40 C to +85 C T amb V HIGH-level input IH voltage V LOW-level input ...
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... NXP Semiconductors and and Fig 11. Test circuit for measuring OFF-state current and V = open-circuit and V = open-circuit Fig 12. Test circuit for measuring ON-state current 11. Dynamic characteristics Table 9. Dynamic characteristics for 74HC4051 GND = ns pF; for test circuit see the input voltage terminal, whichever is assigned as an input. ...
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... NXP Semiconductors Table 9. Dynamic characteristics for 74HC4051 GND = ns pF; for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter Conditions t turn-on time turn-off time off power dissipation per switch; V ...
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... NXP Semiconductors Table 9. Dynamic characteristics for 74HC4051 GND = ns pF; for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter Conditions t turn-on time turn-off time off 40 C to +125 C ...
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... NXP Semiconductors Table 9. Dynamic characteristics for 74HC4051 GND = ns pF; for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter Conditions t turn-off time off [ the same as t and PHL PLH ...
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... NXP Semiconductors Table 10. Dynamic characteristics for 74HCT4051 GND = ns pF; for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter Conditions t turn-off time off power dissipation per switch capacitance = 40 C to +85 C ...
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... NXP Semiconductors Table 10. Dynamic characteristics for 74HCT4051 GND = ns pF; for test circuit see the input voltage terminal, whichever is assigned as an input the output voltage terminal, whichever is assigned as an output. os Symbol Parameter Conditions t turn-off time off [ the same as t and PHL PLH ...
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... NXP Semiconductors E, Sn inputs 0.5 V For 74HC4051 For 74HCT4051 1 Fig 14. Turn-on and turn-off times Definitions for test circuit; see R = termination resistance should be equal to the output impedance load capacitance including jig and probe capacitance load resistance Test selection switch. Fig 15. Test circuit for measuring AC performance ...
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... NXP Semiconductors Table 11. Test data Test Input PHL PLH [ PZH PHZ [ PZL PLZ [ ns; when measuring max [2] V values For 74HC4051 For 74HCT4051 12. Additional dynamic characteristics Table 12. Additional dynamic characteristics Recommended conditions and typical values; GND = the input voltage at pins nYn or nZ, whichever is assigned as an input. ...
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... NXP Semiconductors Fig 16. Test circuit for measuring sine-wave distortion V = 4.5 V; GND = Test circuit 0 iso (dB 100 10 b. Isolation (OFF-state function of frequency Fig 17. Test circuit for measuring isolation (OFF-state) 74HC_HCT4051 Product data sheet Yn/Z Z/ GND 0.1 F Yn/Z Z/ GND EE = 4 k All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors G Fig 18. Test circuit for measuring crosstalk between control input and any switch V = 4.5 V; GND = Test circuit (dB Typical frequency response Fig 19. Test circuit for frequency response 74HC_HCT4051 Product data sheet Sn GND Yn/Z Z/ GND EE = 4 k All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT338-1 Fig 22. Package outline SOT338-1 (SSOP16) ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... Release date 74HC_HCT4051 v.4 20110117 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Figure 6 corrected (errata). 74HC_HCT4051 v.3 ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74HC_HCT4051 Product data sheet 74HC4051 ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 13 12 Additional dynamic characteristics ...