P87C51RC2FA NXP Semiconductors, P87C51RC2FA Datasheet - Page 35

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P87C51RC2FA

Manufacturer Part Number
P87C51RC2FA
Description
MCU 8-Bit 87C 80C51 CISC 32KB EPROM 3.3V/5V 44-Pin PLCC Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P87C51RC2FA

Package
44PLCC
Device Core
80C51
Family Name
87C
Maximum Speed
33 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
UART
Number Of Timers
3
Ram Size
512 Byte
Program Memory Size
32 KB
Program Memory Type
EPROM
Operating Temperature
-40 to 85 °C

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Manufacturer
Quantity
Price
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Philips Semiconductors
2003 Jan 24
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
NOTE:
* User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive
** f
NOTE:
* User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive
Symbol
CIDL
WDTE
CPS1
CPS0
ECF
Symbol
CF
CR
CCF4
CCF3
CCF2
CCF1
CCF0
value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
OSC
= oscillator frequency
Bit:
Bit Addressable
Bit:
Function
Counter Idle control: CIDL = 0 programs the PCA Counter to continue functioning during idle Mode. CIDL = 1 programs
it to be gated off during idle.
Watchdog Timer Enable: WDTE = 0 disables Watchdog Timer function on PCA Module 4. WDTE = 1 enables it.
Not implemented, reserved for future use.*
PCA Count Pulse Select bit 1.
PCA Count Pulse Select bit 0.
CPS1
PCA Enable Counter Overflow interrupt: ECF = 1 enables CF bit in CCON to generate an interrupt. ECF = 0 disables
that function of CF.
Function
PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in CMOD is
set. CF may be set by either hardware or software but can only be cleared by software.
PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be cleared by software to turn the PCA
counter off.
Not implemented, reserved for future use*.
PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
CMOD Address = D9H
0
0
1
1
CCON Address = D8H
CIDL
7
CF
7
CPS0
0
1
0
1
WDTE
Selected PCA Input**
CR
6
6
0
1
2
3
8KB/16KB/32KB/64KB OTP
Figure 23. CCON: PCA Counter Control Register
Figure 22. CMOD: PCA Counter Mode Register
5
Internal clock, f
Internal clock, f
Timer 0 overflow
External clock at ECI/P1.2 pin
5
(max. rate = f
CCF4
4
4
OSC
OSC
OSC
/6 in 6-clock mode (f
/2 in 6-clock mode (f
/4 in 6-clock mode, f
35
CCF3
3
3
CPS1
CCF2
2
2
OSC
OSC
OCS
P87C51RA2/RB2/RC2/RD2
CCF1
/12 in 12-clock mode)
/4 in 12-clock mode)
CPS0
/8 in 12-clock mode)
1
1
CCF0
ECF
0
0
Reset Value = 00XX X000B
Reset Value = 00X0 0000B
SU01318
SU01319
Product data

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