ISPLSI 5256VE-80LT100I LATTICE SEMICONDUCTOR, ISPLSI 5256VE-80LT100I Datasheet - Page 17

• Manufacturer Part Number: ISPLSI 5256VE-80LT100I
• Description: CPLD ispLSI® 5000VE Family 12K Gates 256 Macro Cells 80MHz EECMOS Technology 3.3V 100-Pin TQFP
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPLSI 5256VE-80LT100I

• Package: 100TQFP
• Family Name: ispLSI® 5000VE
• Device System Gates: 12000
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 72
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 80 MHz
• Number Of Product Terms Per Macro: 35
• Operating Temperature: -40 to 85 °C

ispLSI 5256VE Timing Model
CLK
RST
From Feedback
OE
IN
Note: Italicized parameters are delay adders above and beyond default conditions (i.e. GRP load of one GLB, CLK0, high-speed AND Array
and VCC I/O option).
t
Delays
GCLK_IN
In/Out
t
t
GOE
t
RST
t
IOI
IN
t
INREG
t
ROUTE
t
BLA
t
LP
t
t
t
t
PTCLK
PTSR
t
PTSA
BCLK
BSR
Control
Delays
t
PDb
t
GPTOE
t
PTOE
17
Specifications ispLSI 5256VE
DATA
CE
S/R
Latch Delays
MC Reg
Register/
t
PDi
GLB Delays
Routing/
Q
Delays
In/Out
t
t
t
t
t
FBK
BUF
DIS
IOO
EN
5000VE Timing Model
OUT
Feedback