ISPLSI 5256VE-80LT100I LATTICE SEMICONDUCTOR, ISPLSI 5256VE-80LT100I Datasheet - Page 6

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ISPLSI 5256VE-80LT100I

Manufacturer Part Number
ISPLSI 5256VE-80LT100I
Description
CPLD ispLSI® 5000VE Family 12K Gates 256 Macro Cells 80MHz EECMOS Technology 3.3V 100-Pin TQFP
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet

Specifications of ISPLSI 5256VE-80LT100I

Package
100TQFP
Family Name
ispLSI® 5000VE
Device System Gates
12000
Number Of Macro Cells
256
Maximum Propagation Delay Time
15 ns
Number Of User I/os
72
Number Of Logic Blocks/elements
8
Typical Operating Supply Voltage
3.3 V
Maximum Operating Frequency
80 MHz
Number Of Product Terms Per Macro
35
Operating Temperature
-40 to 85 °C
Figure 4. ispLSI 5000VE Macrocell
Note: Not all macrocells have I/O pads.
speed/
power
PTOE
PT Clock
PT Reset
PT Preset
GOE0
GOE1
TOE
Shared PT Reset
Shared PT Clock
Global Reset
PTSA
CLK0
CLK1
CLK2
CLK3
Global PTOE 0
Global PTOE 1
Global PTOE 2
Global PTOE 3
PTSA bypass
6
Specifications ispLSI 5256VE
D
Clk En
Clk
R P
R/L
Q
2.5V/3.3V
Output
Slew
rate
VCCIO
Open
drain
VCC
Input threshold
2.5V/3.3V
VCCIO
I/O Pad
To GRP
To GRP

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