XC3S700AN-4FG484I Xilinx Inc, XC3S700AN-4FG484I Datasheet - Page 119

• Manufacturer Part Number: XC3S700AN-4FG484I
• Description: FPGA Spartan®-3AN Family 700K Gates 13248 Cells 667MHz 90nm Technology 1.2V 484-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S700AN-4FG484I

• Package: 484FBGA
• Family Name: Spartan®-3AN
• Device Logic Units: 13248
• Device System Gates: 700000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 372
• Ram Bits: 368640
• Number Of Logic Elements/cells: 13248
• Number Of Labs/clbs: 1472
• Total Ram Bits: 368640
• Number Of I /o: 372
• Number Of Gates: 700000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

User I/Os by Bank
Table 83
The AWAKE pin is counted as a dual-purpose I/O.
Table 83: User I/Os Per Bank for the XC3S1400AN in the FGG676 Package
Footprint Migration Differences
The XC3S1400AN is the only Spartan-3AN FPGA offered in the FGG676 package. The XC3S1400AN FPGA is pin
compatible with the Spartan-3A XC3S1400A FPGA in the FG(G)676 package, although the Spartan-3A FPGA requires an
external configuration source.
DS557 (v4.1) April 1, 2011
Product Specification
Top
Right
Bottom
Left
Package
Edge
Total
indicates how the 502 available user-I/O pins are distributed between the four I/O banks on the FGG676 package.
I/O Bank
0
1
2
3
Maximum I/Os
120
130
120
132
502
313
I/O
82
67
67
97
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INPUT
20
15
14
18
67
All Possible I/O Pins by Type
Spartan-3AN FPGA Family: Pinout Descriptions
DUAL
30
21
52
1
0
VREF
10
10
38
9
9
CLK
32
8
8
8
8
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