XC3S700AN-4FG484I Xilinx Inc, XC3S700AN-4FG484I Datasheet - Page 36

• Manufacturer Part Number: XC3S700AN-4FG484I
• Description: FPGA Spartan®-3AN Family 700K Gates 13248 Cells 667MHz 90nm Technology 1.2V 484-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S700AN-4FG484I

• Package: 484FBGA
• Family Name: Spartan®-3AN
• Device Logic Units: 13248
• Device System Gates: 700000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 372
• Ram Bits: 368640
• Number Of Logic Elements/cells: 13248
• Number Of Labs/clbs: 1472
• Total Ram Bits: 368640
• Number Of I /o: 372
• Number Of Gates: 700000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Output Propagation Times
Table 27: Timing for the IOB Output Path
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
2.
Clock-to-Output Times
Propagation Times
Set/Reset Times
T
Symbol
The numbers in this table are tested using the methodology presented in
Table 10
This time requires adjustment whenever a signal standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data
Output. When this is true, add the appropriate Output adjustment from
T
T
T
IOGSRQ
IOCKP
IOSRP
IOOP
and
Table
When reading from the Output
Flip-Flop (OFF), the time from the
active transition at the OCLK input to
data appearing at the Output pin
The time it takes for data to travel from
the IOB’s O input to the Output pin
Time from asserting the OFF’s SR
input to setting/resetting data at the
Output pin
Time from asserting the Global Set
Reset (GSR) input on the
STARTUP_SPARTAN3A primitive to
setting/resetting data at the Output pin
13.
Description
LVCMOS25
drive, Fast slew rate
LVCMOS25
drive, Fast slew rate
LVCMOS25
drive, Fast slew rate
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Spartan-3AN FPGA Family: DC and Switching Characteristics
Conditions
(2)
(2)
(2)
Table
, 12 mA output
, 12 mA output
, 12 mA output
Table 30
29.
and are based on the operating conditions set forth in
Device
All
All
All
Max
2.87
2.78
3.63
8.62
Speed Grade
-5
Max
3.13
2.91
3.89
9.65
-4
Units
ns
ns
ns
ns
36