ISPLSI 2064VE-135LT100I LATTICE SEMICONDUCTOR, ISPLSI 2064VE-135LT100I Datasheet - Page 4

• Manufacturer Part Number: ISPLSI 2064VE-135LT100I
• Description: CPLD ispLSI® 2000VE Family 2K Gates 64 Macro Cells 135MHz EECMOS Technology 3.3V 100-Pin TQFP
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPLSI 2064VE-135LT100I

• Package: 100TQFP
• Family Name: ispLSI® 2000VE
• Device System Gates: 2000
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 16
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 135 MHz
• Operating Temperature: -40 to 85 °C

1. One output at a time for a maximum duration of one second. V
2. Measured using four 16-bit counters.
3. Typical values are at V = 3.3V and T = 25°C.
4. Maximum I
Output Load Conditions (see Figure 2)
3-state levels are measured 0.5V from
steady-state active level.
V
V
I
I
I
I
I
I
DC Electrical Characteristics
SYMBOL
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
IL
IH
IL-isp
IL-PU
OS
CC
OL
OH
problems by tester ground degradation. Characterized but not 100% tested.
section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to
estimate maximum I
A
B
C
1
2, 4
TEST CONDITION
Active High
Active Low
Active High to Z
at V -0.5V
Active Low to Z
at V +0.5V
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
BSCAN Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
Operating Power Supply Current
OH
OL
CC
varies widely with specific device configuration and operating frequency. Refer to the Power Consumption
PARAMETER
CC
CC
.
316Ω
316Ω
316Ω
Over Recommended Operating Conditions
R1
∞
∞
≤ 1.5 ns 10% to 90%
A
GND to 3.0V
See Figure 2
348Ω
348Ω
348Ω
348Ω
348Ω
R2
1.5V
1.5V
Table 2-0003/2064VE
Table 2-0004/2064V
I = 8 mA
I
0V ≤ V ≤ V (Max.)
(V
V ≤ V ≤ 5.25V
0V ≤ V ≤ V
0V ≤ V ≤ V
V = 3.3V, V
V = 0.0V, V = 3.0V
f
OL
OH
CLOCK
CC
CC
IL
35pF
35pF
35pF
CC
5pF
5pF
CL
= -4 mA
– 0.2)V ≤ V ≤ V
= 1 MHz
IN
IN
IN
IN
4
IL
IL
IL
IH
OUT
Figure 2. Test Load
OUT
Specifications ispLSI 2064VE
CONDITION
*
Device
Output
= 0.5V was selected to avoid test
C L includes Test Fixture and Probe Capacitance.
IN
= 0.5V
CC
+ 3.3V
MIN.
R 1
R 2
2.4
–
–
–
–
–
–
–
–
TYP.
90
–
–
–
–
–
–
–
–
C L
3
*
MAX. UNITS
-150
-150
-100
Table 2-0007/2064VE
0.4
-10
10
10
–
–
0213A/2064V
Point
Test
mA
mA
µA
µA
µA
µA
µA
V
V