PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 107

• Manufacturer Part Number: PIC16F1937-E/MV
• Description: 14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-E/MV

• Processor Series: PIC16F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 14 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

8.0
The PIC16F1934/6/7 has an internal Low Dropout
Regulator (LDO) which provides operation above 3.6V.
The LDO regulates a voltage for the internal device
logic while permitting the V
at a higher voltage. There is no user enable/disable
control available for the LDO, it is always active. The
PIC16(L)F1934/6/7 operates at a maximum V
3.6V and does not incorporate an LDO.
A device I/O pin may be configured as the LDO voltage
output, identified as the V
required, an external low-ESR capacitor may be con-
nected to the V
The VCAPEN<1:0> bits of Configuration Word 2 deter-
mines which pin is assigned as the V
Table
TABLE 8-1:
TABLE 8-2:
 2008-2011 Microchip Technology Inc.
CONFIG2
Legend:
Note 1:
Name
VCAPEN<1:0>
8-1.
LOW DROPOUT (LDO)
VOLTAGE REGULATOR
— = unimplemented locations read as ‘0’. Shaded cells are not used by LDO.
PIC16F1934/6/7 only.
00
01
10
11
Bits
13:8
7:0
CAP
VCAPEN<1:0> SELECT BITS
SUMMARY OF CONFIGURATION WORD WITH LDO
pin for additional regulator stability.
Bit -/7
—
—
DD
CAP
and I/O pins to operate
Bit -/6
—
—
pin. Although not
No Vcap
CAP
RA0
RA5
RA6
Pin
VCAPEN1
pin. Refer to
Bit 13/5
LVP
DD
(1)
VCAPEN0
of
Bit 12/4
DEBUG
(1)
On power-up, the external capacitor will load the LDO
voltage regulator. To prevent erroneous operation, the
device is held in Reset while a constant current source
charges the external capacitor. After the cap is fully
charged, the device is released from Reset. For more
information on recommended capacitor values and the
constant current rate, refer to the LDO Regulator
Characteristics Table in the applicable Electrical
Specifications Chapter.
Bit 11/3
—
—
PIC16(L)F1934/6/7
Bit 10/2
BORV
—
STVREN
Bit 9/1
WRT1
DS41364E-page 107
PLLEN
Bit 8/0
WRT0
Register
on Page
64