PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 47

• Manufacturer Part Number: PIC16F1937-E/MV
• Description: 14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-E/MV

• Processor Series: PIC16F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 14 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

TABLE 3-12:
 2008-2011 Microchip Technology Inc.
400h
401h
402h
403h
404h
405h
406h
407h
408h
409h
40Ah
40Bh
40Ch
40Dh
40Eh
40Fh
410h
411h
412h
413h
414h
415h
416h
417h
418h
419h
41Ah
41Bh
41Ch
41Dh
41Eh
41Fh
Legend:
Note
Address
Bank 8
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1, 2)
(2)
1:
2:
3:
4:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
—
—
—
—
—
—
—
—
TMR4
PR4
T4CON
—
—
—
—
TMR6
PR6
T6CON
—
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
These registers/bits are not implemented on PIC16(L)F1936 devices, read as ‘0’.
Unimplemented, read as ‘1’.
Name
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer4 Module Register
Timer4 Period Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer6 Module Register
Timer6 Period Register
Unimplemented
Bit 7
GIE
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
Bit 6
PEIE
—
—
TMR0IE
Bit 5
—
—
T4OUTPS<3:0>
T6OUTPS<3:0>
Bit 4
INTE
TO
IOCIE
Bit 3
PD
PIC16(L)F1934/6/7
BSR<4:0>
TMR4ON
TMR6ON
TMR0IF
Bit 2
Z
Bit 1
INTF
DC
T4CKPS
T6CKPS
<1:0>
<1:0>
IOCIF
Bit 0
C
DS41364E-page 47
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
-000 0000 -000 0000
0000 0000 0000 0000
1111 1111 1111 1111
-000 0000 -000 0000
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Value on all
Resets
other
—
—
—
—
—
—
—
—
—
—
—
—
—
—