PIC18F26K80-E/MM Microchip Technology, PIC18F26K80-E/MM Datasheet - Page 242

ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE

PIC18F26K80-E/MM

Manufacturer Part Number
PIC18F26K80-E/MM
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F26K80-E/MM

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3648 B
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F66K80 FAMILY
18.1
The control registers for the CTMU are:
• CTMUCONH
• CTMUCONL
• CTMUICON
REGISTER 18-1:
DS39977C-page 242
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CTMUEN
R/W-0
CTMU Registers
CTMUEN: CTMU Enable bit
1 = Module is enabled
0 = Module is disabled
Unimplemented: Read as ‘ 0 ’
CTMUSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
TGEN: Time Generation Enable bit
1 = Enables edge delay generation
0 = Disables edge delay generation
EDGEN: Edge Enable bit
1 = Edges are not blocked
0 = Edges are blocked
ESGSEQEN: Edge Sequence Enable bit
1 = Edge 1 event must occur before Edge 2 event can occur
0 = No edge sequence is needed
IDISSEN: Analog Current Source Control bit
1 = Analog current source output is grounded
0 = Analog current source output is not grounded
CTTRIG: CTMU Special Event Trigger bit
1 = CTMU Special Event Trigger is enabled
0 = CTMU Special Event Trigger is disabled
U-0
CTMUCONH: CTMU CONTROL HIGH REGISTER
W = Writable bit
‘1’ = Bit is set
CTMUSIDL
R/W-0
R/W-0
TGEN
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EDGEN
R/W-0
The
(Register 18-1
for configuring the CTMU module edge source selec-
tion, edge source polarity selection, edge sequencing,
A/D trigger, analog circuit capacitor discharge and
enables. The CTMUICON register
bits for selecting the current source range and current
source trim.
CTMUCONH
EDGSEQEN
R/W-0
and
Register
and
 2011 Microchip Technology Inc.
x = Bit is unknown
IDISSEN
18-2) contain control bits
R/W-0
CTMUCONL
(Register
CTTRIG
R/W-0
18-3) has
registers
bit 0

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