PIC18F26K80-E/MM Microchip Technology, PIC18F26K80-E/MM Datasheet - Page 97

ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE

PIC18F26K80-E/MM

Manufacturer Part Number

PIC18F26K80-E/MM

Description

ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE

Manufacturer

Microchip Technology

Series

PIC® XLP™ 18Fr

Datasheet

1.PIC18F25K80-ISO.pdf (628 pages)

Specifications of PIC18F26K80-E/MM

Core Processor

PIC

Core Size

8-Bit

Speed

64MHz

Connectivity

ECAN, I²C, LIN, SPI, UART/USART

Peripherals

Brown-out Detect/Reset, LVD, POR, PWM, WDT

Number Of I /o

Program Memory Size

64KB (32K x 16)

Program Memory Type

FLASH

Eeprom Size

1K x 8

Ram Size

3.6K x 8

Voltage - Supply (vcc/vdd)

1.8 V ~ 5.5 V

Data Converters

A/D 8x12b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 125°C

Package / Case

Processor Series

PIC18F26K80

Core

PIC

Data Bus Width

8 bit

Data Ram Size

3648 B

Interface Type

I2C, SPI

Maximum Clock Frequency

64 MHz

Number Of Programmable I/os

Number Of Timers

Operating Supply Voltage

1.8 V to 5.5 V

Maximum Operating Temperature

+ 125 C

Mounting Style

SMD/SMT

Minimum Operating Temperature

- 40 C

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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TABLE 5-4:

 2011 Microchip Technology Inc.

TXB1SIDL

TXB1SIDH

TXB1CON

CANCON_RO3

CANSTAT_RO3

TXB2D7

TXB2D6

TXB2D5

TXB2D4

TXB2D3

TXB2D2

TXB2D1

TXB2D0

TXB2DLC

TXB2EIDL

TXB2EIDH

TXB2SIDL

TXB2SIDH

TXB2CON

RXM1EIDL

RXM1EIDH

RXM1SIDL

RXM1SIDH

RXM0EIDL

RXM0EIDH

RXM0SIDL

RXM0SIDH

RXF5EIDL

RXF5EIDH

RXF5SIDL

RXF5SIDH

RXF4EIDL

RXF4EIDH

RXF4SIDL

Legend:

Note 1:

u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware

stack.

See

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not

enabled as PORTA pins, they are disabled and read ‘0’.

This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.

Table 5-3

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

PIC18F2XK80

for Reset value for specific condition.

Applicable Devices

PIC18F4XK80

PIC18F6XK80

Preliminary

PIC18F66K80 FAMILY

xxxx x-xx

xxxx xxxx

0000 0000

1000 0000

xxxx xxxx

-x-- xxxx

xxxx xxxx

xxx- x-xx

xxxx xxxx

0000 0-00

xxxx xxxx

xxx- x-xx

xxxx xxxx

xxx- x-xx

xxxx xxxx

xxx- x-xx

xxxx xxxx

xxx- x-xx

Brown-out

Power-on

Reset,

Reset

RESET Instruction,

MCLR Resets,

Stack Resets

WDT Reset,

uuuu u-uu

uuuu uuuu

0000 0000

1000 0000

uuuu uuuu

-u-- uuuu

uuuu uuuu

uuu- u-uu

uuuu uuuu

0000 0-00

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

DS39977C-page 97

Wake-up via

uuuu u-uu

uuuu uuuu

-u-- uuuu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuuu u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

uuuu uuuu

uuu- u-uu

or Interrupt

WDT

PIC18F26K80-E/MM Microchip Technology, PIC18F26K80-E/MM Datasheet - Page 97

PIC18F26K80-E/MM

Specifications of PIC18F26K80-E/MM

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