PIC18F26K80-E/MM Microchip Technology, PIC18F26K80-E/MM Datasheet - Page 90

ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE

PIC18F26K80-E/MM

Manufacturer Part Number

PIC18F26K80-E/MM

Description

ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE

Manufacturer

Microchip Technology

Series

PIC® XLP™ 18Fr

Datasheet

1.PIC18F25K80-ISO.pdf (628 pages)

Specifications of PIC18F26K80-E/MM

Core Processor

PIC

Core Size

8-Bit

Speed

64MHz

Connectivity

ECAN, I²C, LIN, SPI, UART/USART

Peripherals

Brown-out Detect/Reset, LVD, POR, PWM, WDT

Number Of I /o

Program Memory Size

64KB (32K x 16)

Program Memory Type

FLASH

Eeprom Size

1K x 8

Ram Size

3.6K x 8

Voltage - Supply (vcc/vdd)

1.8 V ~ 5.5 V

Data Converters

A/D 8x12b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 125°C

Package / Case

Processor Series

PIC18F26K80

Core

PIC

Data Bus Width

8 bit

Data Ram Size

3648 B

Interface Type

I2C, SPI

Maximum Clock Frequency

64 MHz

Number Of Programmable I/os

Number Of Timers

Operating Supply Voltage

1.8 V to 5.5 V

Maximum Operating Temperature

+ 125 C

Mounting Style

SMD/SMT

Minimum Operating Temperature

- 40 C

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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PIC18F66K80 FAMILY

TABLE 5-4:

DS39977C-page 90

TOSU

TOSH

TOSL

STKPTR

PCLATU

PCLATH

PCL

TBLPTRU

TBLPTRH

TBLPTRL

TABLAT

PRODH

PRODL

INTCON

INTCON2

INTCON3

INDF0

POSTINC0

POSTDEC0

PREINC0

PLUSW0

FSR0H

FSR0L

WREG

INDF1

POSTINC1

POSTDEC1

PREINC1

PLUSW1

FSR1H

FSR1L

BSR

INDF2

Legend:

Note 1:

u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware

stack.

See

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not

enabled as PORTA pins, they are disabled and read ‘0’.

This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.

Table 5-3

INITIALIZATION CONDITIONS FOR ALL REGISTERS

PIC18F2XK80

for Reset value for specific condition.

Applicable Devices

PIC18F4XK80

Preliminary

PIC18F6XK80

---0 0000

0000 0000

00-0 0000

---0 0000

0000 0000

--00 0000

0000 0000

xxxx xxxx

0000 000x

1111 -1-1

11x0 0x00

---- xxxx

xxxx xxxx

---- xxxx

xxxx xxxx

---- 0000

Brown-out

Power-on

Reset,

Reset

N/A

RESET Instruction,

MCLR Resets,

Stack Resets

WDT Reset,

---0 0000

0000 0000

uu-0 0000

---0 0000

0000 0000

--00 0000

0000 0000

uuuu uuuu

0000 000u

1111 -1-1

11x0 0x00

---- uuuu

uuuu uuuu

---- uuuu

uuuu uuuu

---- 0000

 2011 Microchip Technology Inc.

N/A

---0 uuuu

uuuu uuuu

uu-u uuuu

---u uuuu

uuuu uuuu

--uu uuuu

uuuu uuuu

uuuu -u-u

uuuu uuuu

---- uuuu

uuuu uuuu

---- uuuu

uuuu uuuu

---- uuuu

Wake-up via

or Interrupt

PC + 2

WDT

N/A

(2)

(3)

(1)

PIC18F26K80-E/MM Microchip Technology, PIC18F26K80-E/MM Datasheet - Page 90

PIC18F26K80-E/MM

Specifications of PIC18F26K80-E/MM

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