PIC18F46J13T-I/PT Microchip Technology, PIC18F46J13T-I/PT Datasheet - Page 114

• Manufacturer Part Number: PIC18F46J13T-I/PT
• Description: 44-pin, GP, 64KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 44 TQFP 10x10
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46J13T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F47J13 FAMILY
EXAMPLE 7-3:
DS39974A-page 114
ERASE_BLOCK
RESTART_BUFFER
FILL_BUFFER
WRITE_BUFFER
WRITE_BYTE_TO_HREGS
PROGRAM_MEMORY
Required
Sequence
WRITING TO FLASH PROGRAM MEMORY
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
...
MOVLW
MOVWF
MOVFF
MOVWF
TBLWT+*
DECFSZ COUNTER
BRA
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
BCF
DECFSZ WRITE_COUNTER
BRA
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
EECON1, WREN
EECON1, FREE
INTCON, GIE
0x55
EECON2
0xAA
EECON2
EECON1, WR
INTCON, GIE
D'16'
WRITE_COUNTER
D'64'
COUNTER
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
D'64'
COUNTER
POSTINC0, WREG
TABLAT
WRITE_BYTE_TO_HREGS
EECON1, WREN
INTCON, GIE
0x55
EECON2
0xAA
EECON2
EECON1, WR
INTCON, GIE
EECON1, WREN
RESTART_BUFFER
Preliminary
; Load TBLPTR with the base address
; of the memory block, minus 1
; enable write to memory
; enable Erase operation
; disable interrupts
; write 55h
; write 0AAh
; start erase (CPU stall)
; re-enable interrupts
; Need to write 16 blocks of 64 to write
; one erase block of 1024
; point to buffer
; read the new data from I2C, SPI,
; PSP, USART, etc.
; number of bytes in holding register
; get low byte of buffer data
; present data to table latch
; write data, perform a short write
; to internal TBLWT holding register.
; loop until buffers are full
; enable write to memory
; disable interrupts
; write 55h
; write 0AAh
; start program (CPU stall)
; re-enable interrupts
; disable write to memory
; done with one write cycle
; if not done replacing the erase block
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