PIC18F46J13T-I/PT Microchip Technology, PIC18F46J13T-I/PT Datasheet - Page 427

• Manufacturer Part Number: PIC18F46J13T-I/PT
• Description: 44-pin, GP, 64KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC, NanoWatt XLP 44 TQFP 10x10
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46J13T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 27-2:
 2010 Microchip Technology Inc.
OR
PIC18LFXXJ13 Devices (Regulator Disabled):
PIC18FXXJ13 Devices (Regulator Enabled):
2.5V
C
F
3.3V
2.5V
3.3V
CONNECTIONS FOR THE
ON-CHIP REGULATOR
V
V
V
V
V
V
V
V
V
DD
DDCORE
SS
DD
DDCORE
SS
DD
DDCORE
SS
PIC18LFXXJ13
PIC18LFXXJ13
PIC18FXXJ13
/V
/V
/V
CAP
CAP
CAP
Preliminary
PIC18F47J13 FAMILY
27.3.2
When the on-chip regulator is enabled, PIC18F47J13
family devices also have a simple brown-out capability.
If the voltage supplied to the regulator is inadequate to
maintain a minimum output level, the regulator Reset
circuitry will generate a Brown-out Reset (BOR). This
event is captured by the BOR flag bit (RCON<0>).
The operation of the BOR is described in more detail in
Section 5.4
Section 5.4.1 “Detecting BOR”. The brown-out voltage
levels are specific in Section 30.1 “DC Characteristics:
Supply Voltage PIC18F47J13 Family (Industrial)”.
27.3.3
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
exceed V
27.3.4
When enabled, the on-chip regulator always consumes
a small incremental amount of current over I
includes when the device is in Sleep mode, even
though the core digital logic does not require much
power. To provide additional savings in applications
where power resources are critical, the regulator can
be configured to automatically enter a lower quiescent
draw Standby mode whenever the device goes into
Sleep mode. This feature is controlled by the REGSLP
bit (WDTCON<7>, Register 27-11). If this bit is set
upon entry into Sleep mode, the regulator will transition
into a lower power state. In this state, the regulator still
provides a regulated output voltage necessary to
maintain SRAM state information, but consumes less
quiescent current.
Substantial Sleep mode power savings can be
obtained by setting the REGSLP bit, but device
wake-up time will increase in order to insure the
regulator has enough time to stabilize.
DD
ON-CHIP REGULATOR AND BOR
POWER-UP REQUIREMENTS
OPERATION IN SLEEP MODE
by 0.3 volts.
“Brown-out
Reset
DS39974A-page 427
DDCORE
(BOR)”
should not
DD
. This
and