PIC18F87K90T-I/PT Microchip Technology, PIC18F87K90T-I/PT Datasheet - Page 147

• Manufacturer Part Number: PIC18F87K90T-I/PT
• Description: 128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90T-I/PT

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 11
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Details

REGISTER 10-18: IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
REGISTER 10-19: IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4
 2009-2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit
bit
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
CCP10IP
TMR5GIP
R/W-1
R/W-1
(1)
CCP10IP and CCP9IP are unimplemented in devices with a program memory of 32 Kbytes (PIC18FX5K90).
TMR5GIP: Timer5 Gate interrupt Priority bit
1 = High priority
0 = Low priority
LCDIP: LCD Interrupt Priority bit (valid when the Type-B waveform with Non-Static mode is selected)
1 = High priority
0 = Low priority
RC2IP: AUSART Receive Priority Flag bit
1 = High priority
0 = Low priority
TX2IP: AUSART Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
CTMUIP: CTMU Interrupt Priority bit
1 = High priority
0 = Low priority
CCP2IP: ECCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP1IP: ECCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
RTCCIP: RTCC Interrupt Priority bit
1 = High priority
0 = Low priority
CCP10IP:CCP3IP: CCP<10:3> Interrupt Priority bits
1 = High priority
0 = Low priority
CCP9IP
LCDIP
R/W-1
R/W-1
(1)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
RC2IP
CCP8IP
R/W-1
R-1
CCP7IP
TX2IP
R/W-1
R-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K90 FAMILY
CCP6IP
CTMUIP
R/W-1
R/W-1
(1)
CCP5IP
CCP2IP
R/W-1
R/W-1
x = Bit is unknown
x = Bit is unknown
CCP1IP
CCP4IP
R/W-1
R/W-1
DS39957D-page 147
RTCCIP
CCP3IP
R/W-1
R/W-1
bit 0
bit 0