PIC18F87K90T-I/PT Microchip Technology, PIC18F87K90T-I/PT Datasheet - Page 347

128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/

PIC18F87K90T-I/PT

Manufacturer Part Number
PIC18F87K90T-I/PT
Description
128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F87K90T-I/PT

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
11
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87K90T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F87K90T-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
21.4.17.3
Bus collision occurs during a Stop condition if:
a)
b)
FIGURE 21-33:
FIGURE 21-34:
 2009-2011 Microchip Technology Inc.
After the SDAx pin has been deasserted and
allowed to float high, SDAx is sampled low after
the BRG has timed out.
After the SCLx pin is deasserted, SCLx is
sampled low before SDAx goes high.
SDAx
SCLx
PEN
BCLxIF
P
SSPxIF
SDAx
SCLx
PEN
BCLxIF
P
SSPxIF
Bus Collision During a Stop
Condition
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDAx Asserted Low
Assert SDAx
T
T
BRG
BRG
T
BRG
T
BRG
PIC18F87K90 FAMILY
The Stop condition begins with SDAx asserted low.
When SDAx is sampled low, the SCLx pin is allowed to
float. When the pin is sampled high (clock arbitration),
the
SSPxADD<6:0> and counts down to 0. After the BRG
times out, SDAx is sampled. If SDAx is sampled low, a
bus collision has occurred. This is due to another
master attempting to drive a data ‘0’
the SCLx pin is sampled low before SDAx is allowed to
float high, a bus collision occurs. This is another case
of another master attempting to drive a data ‘0’
(Figure
Baud
21-34).
SCLx goes Low Before SDAx goes High,
Set BCLxIF
T
BRG
T
Rate
BRG
Generator
SDAx Sampled
Low After T
Set BCLxIF
‘0’
‘0’
‘0’
‘0’
DS39957D-page 347
is
(Figure
loaded
BRG
21-33). If
,
with

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