PIC18F87K90T-I/PT Microchip Technology, PIC18F87K90T-I/PT Datasheet - Page 492

128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/

PIC18F87K90T-I/PT

Manufacturer Part Number
PIC18F87K90T-I/PT
Description
128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F87K90T-I/PT

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
11
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87K90T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F87K90T-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F87K90 FAMILY
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39957D-page 492
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
W
REG
W
Q1
=
=
=
=
register ‘f’
Exclusive OR W with f
XORWF
0  f  255
d  [ 0,1 ]
a  [ 0,1 ]
(W) .XOR. (f)  dest
N, Z
Exclusive OR the contents of W with
register ‘f’. If ‘d’ is ‘ 0 ’, the result is stored
in W. If ‘d’ is ‘ 1 ’, the result is stored back
in the register ‘f’.
If ‘a’ is ‘ 0 ’, the Access Bank is selected.
If ‘a’ is ‘ 1 ’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘ 0 ’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f  95 (5Fh). See
Section 29.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode”
1
1
XORWF
Read
0001
Q2
AFh
B5h
1Ah
B5h
REG, 1, 0
f {,d {,a}}
10da
Process
Data
Q3
ffff
for details.
destination
Write to
Q4
ffff
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